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UMTS/HSPA+ Module Series

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4.2. USB_BOOT Interface

The module provides a USB_BOOT pin. You can pull up USB_BOOT to VDD_EXT before powering on

the module, thus the module will enter emergency download mode when powered on. In this mode, the

module supports firmware upgrade over USB interface.

Table 13: Pin Definition of USB_BOOT Interface

The following figure shows a reference circuit of USB_BOOT interface.

Module

USB_BOOT

VDD_EXT

4.7K

Test point

TVS

Close to test point

Figure 17: Reference Circuit of USB_BOOT Interface

Pin Name

Pin No.

I/O

Description

Comment

USB_BOOT

115

Forces the module to enter

download mode

1.8 V power domain.

Active High.

It is recommended to

reserve test points.

Summary of Contents for HSPA+ Series

Page 1: ...UC200A GL Hardware Design UMTS HSPA Module Series Version 1 0 0 Date 2021 11 19 Status Preliminary ...

Page 2: ...employ commercially reasonable efforts to provide the best possible experience you hereby acknowledge and agree that this document and related services hereunder are provided to you on an as available basis We may revise or restate this document from time to time at our sole discretion without any prior notice to you Use and Disclosure Restrictions Copyright Our and third party products hereunder ...

Page 3: ...tool information or product We moreover disclaim any and all warranties arising from the course of dealing or usage of trade Disclaimer a We acknowledge no liability for any injury or damage arising from the reliance upon the information b We shall bear no liability resulting from any inaccuracies or omissions or from the use of the information contained herein c While we have made every effort to...

Page 4: ...e interference on sensitive medical equipment so please be aware of the restrictions on the use of wireless devices when in hospitals clinics or other healthcare facilities Cellular terminals or mobiles operating over radio signal and cellular network cannot be guaranteed to connect in certain conditions such as when the mobile bill is unpaid or the U SIM card is invalid When emergent help is need...

Page 5: ... Series UC200A GL_Hardware_Design 4 78 About the Document Revision History Version Date Author Description 2021 10 29 Anthony LIU Ethan FANG Creation of the document 1 0 0 2021 10 29 Anthony LIU Ethan FANG Preliminary ...

Page 6: ...SB Application with USB Remote Wakeup Function 23 3 2 2 1 USB Application with USB Suspend Resume and MAIN_RI Wakeup Function 24 3 2 2 2 USB Application without USB Suspend Function 25 3 3 Airplane Mode 26 3 3 1 Hardware 26 3 3 2 Software 26 3 4 Power Supply 26 3 4 1 Power Supply Interfaces 26 3 4 2 Reference Design for Power Supply 27 3 4 3 Requirements for Voltage Stability 28 3 5 Turn On 29 3 5...

Page 7: ...esign of RF Routing 52 5 3 Requirements for Antenna Design 54 5 4 RF Connector Recommendation 55 6 Electrical Characteristics Reliability 57 6 1 Absolute Maximum Ratings 57 6 2 Power Supply Ratings 58 6 3 Power Consumption 58 6 4 Digital I O Characteristic 60 6 5 ESD 61 6 6 Operating and Storage Temperatures 62 7 Mechanical Information 63 7 1 Mechanical Dimensions 63 7 2 Recommended Footprint 65 7...

Page 8: ...44 Table 20 Pin Definition of ADC Interface 45 Table 21 Characteristics of ADC Interface 46 Table 22 Pin Definition of Indication Signal 46 Table 23 Working State of the Network Connection Status Activity Indication 47 Table 24 Behaviors of the MAIN_RI 48 Table 25 Pin Definition of Cellular Network Interface 49 Table 26 Operating Frequency of UC200A GL 49 Table 27 Tx Power 50 Table 28 Conducted RF...

Page 9: ...UMTS HSPA Module Series UC200A GL_Hardware_Design 8 78 Table 42 Terms and Abbreviations 72 ...

Page 10: ...or 38 Figure 21 Reference Circuit of U SIM Interface with a 6 pin U SIM Card Connector 39 Figure 22 Timing Sequence for Short frame mode 40 Figure 23 PCM and I2C Interface Circuit Reference Design 41 Figure 24 Reference Circuit with Translator Chip 43 Figure 25 Reference Circuit with Transistor Circuit 43 Figure 26 Reference Circuit of SD Card Interface 44 Figure 27 Reference Circuit of the Networ...

Page 11: ...UMTS HSPA Module Series UC200A GL_Hardware_Design 10 78 Figure 43 Plastic Reel Dimension Drawing 70 Figure 44 Packaging Process 71 ...

Page 12: ...e to design and set up mobile applications easily 1 1 Special Marks Table 1 Special Marks Mark Definition Unless otherwise specified when an asterisk is used after a function feature interface pin name AT command or argument it indicates that the function feature interface pin AT command or argument is under development and currently not supported and the asterisk after a model indicates that the ...

Page 13: ...and GPRS coverage Provides audio support for customers specific applications Table 2 Brief Introduction of the Module 2 1 Frequency Bands and Functions Table 3 Wireless Network Type Categories Packaging and pins number 80 LCC pins 64 LGA pins Dimensions 29 0 0 15 mm 32 0 0 15 mm 2 4 0 2 mm Weight approx 4 4 g Wireless network functions WCDMA GSM Type UC200A GL WCDMA B1 B2 B5 B8 GSM 850 900 1800 19...

Page 14: ...ports master and slave modes I2C Interface Supports one digital I2C interface Complies with I2C bus protocol specifications 100 400 kHz The multi host mode is not supported USB Interface Compliant with USB 2 0 specification slave only the data transfer rate can reach up to 480 Mbps Used for AT command communication data transmission software debugging and firmware upgrade Supports USB serial drive...

Page 15: ...lass E2 27 dBm 3 dB EGSM900 8 PSK Class E2 27 dBm 3 dB DCS1800 8 PSK Class E2 26 dBm 3 dB PCS1900 8 PSK Class E2 26 dBm 3 dB WCDMA Class 3 24 dBm 1 3 dB UMTS Features Supports 3GPP R7 HSPA HSDPA HSUPA and WCDMA Supports QPSK 16QAM 64QAM modulation HSPA Max 21 Mbps DL HSUPA Max 5 76 Mbps UL WCDMA Max 384 kbps DL 384 kbps UL GSM Features GPRS Supports GPRS multi slot class 12 Coding scheme CS 1 4 Ma...

Page 16: ...D_DET 23 PCM_DIN 24 PCM_DOUT 25 PCM_SYN C 26 PCM_CL K 27 SD_SDI O _DAT A3 28 SD_SDI O _DAT A2 29 SD_SDI O _DAT A1 30 SD_SDI O _DAT A0 31 SD_SDI O _CL K 32 SD_SDI O _CMD 33 SD_SDI O _VDD 34 RES ERVED 35 GND 36 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND A N T _M A I N GND 144 143 54 53 52 51 50 49 48 47 46 GND 4...

Page 17: ...nected to the ground network Type Description AI Analog Input AIO Analog Input Output DI Digital Input DO Digital Output DIO Digital Input Output OD Open Drain PI Power Input PO Power Output Power Supply Pin Name Pin No I O Description DC Characteristics Comment VBAT_BB 59 60 PI Power supply for the module s baseband part Vmax 4 5 V Vmin 3 4 V Vnom 3 8 V It must be provided with sufficient current...

Page 18: ...ics Comment STATUS 61 OD Indicate the module s operation status External pull to 1 8 V If unused keep it open NET_STATUS 6 DO Indicate the module s network activity status VOHmin 1 35 V VOLmax 0 45 V 1 8 V power domain If unused keep it open NET_MODE 5 DO Indicate the module s network registration mode USB Interface Pin Name Pin No I O Description DC Characteristics Comment USB_VBUS 71 AI USB conn...

Page 19: ...x 0 45 V VOHmin 1 35 V 3 0 V U SIM VOLmax 0 45 V VOHmin 2 55 V USIM_RST 17 DO U SIM card reset USIM_DET 13 DI U SIM card hot plug detect VILmin 0 3 V VILmax 0 6 V VIHmin 1 2 V VIHmax 2 0 V 1 8 V power domain If unused keep it open SD Interface Pin Name Pin No I O Description DC Characteristics Comment SD_SDIO_CLK 32 DO SD card SDIO clock 1 8 2 8 V power domain If unused keep it open SD_SDIO_CMD 33...

Page 20: ...Main UART data terminal ready MAIN_RXD 68 DI Main UART receive MAIN_TXD 67 DO Main UART transmit VOLmax 0 45 V VOHmin 1 35 V Debug UART Interface Pin Name Pin No I O Description DC Characteristics Comment DBG_RXD 11 DI Debug UART transmit VILmin 0 3 V VILmax 0 6 V VIHmin 1 2 V VIHmax 2 0 V 1 8 V power domain If unused keep it open DBG_TXD 12 DO Debug UART receive VOLmax 0 45 V VOHmin 1 35 V I2C In...

Page 21: ... Interface Pin Name Pin No I O Description DC Characteristics Comment ANT_MAIN 49 AIO Main antenna interface ADC Interface Pin Name Pin No I O Description DC Characteristics Comment ADC0 45 AI General purpose ADC interface Voltage Range 0 V VBAT_BB If unused keep it open ADC1 44 AI Other Interface Pin Name Pin No I O Description DC Characteristics Comment USB_BOOT 115 DI Forces the module to enter...

Page 22: ...RS 232 converter cable earphone antenna and other peripherals to control or to test the module For more details see document 1 Pull up by default In low voltage level module can enter into airplane mode If unused keep it open GND Pin Name Pin No GND 8 9 10 19 22 36 46 48 50 54 56 72 85 112 RESERVED Pins Pin Name Pin No Comment RESERVED 3 18 35 37 40 43 47 55 73 84 113 114 116 144 Keep these pins o...

Page 23: ...e data Talk Data Network connection is ongoing In this mode the power consumption is decided by network setting and data transfer rate Minimum Functionality Mode AT CFUN 0 can set the module to a minimum functionality mode In this case both RF function and U SIM card will be invalid Airplane Mode AT CFUN 4 or W_DISABLE pin can set the module to airplane mode In this case RF function will be invali...

Page 24: ...D Figure 2 Sleep Mode Application via UART Driving MAIN_DTR to low level by host will wake up the module When the module has a URC to report the URC will trigger the behavior of MAIN_RI pin Please refer to Chapter 4 9 for details about MAIN_RI behavior 3 2 2 USB Application with USB Remote Wakeup Function If the host supports USB Suspend Resume and remote wakeup functions the following three preco...

Page 25: ... remote wakeup signals via USB bus to wake up the host 3 2 2 1 USB Application with USB Suspend Resume and MAIN_RI Wakeup Function If the host supports USB Suspend Resume but does not support remote wakeup function the MAIN_RI signal is needed to wake up the host There are three preconditions to let the module enter sleep mode Execute AT QSCLK 1 to enable the sleep mode Ensure the MAIN_DTR is held...

Page 26: ...e refer to Chapter 4 9 for details about MAIN_RI behavior 3 2 2 2 USB Application without USB Suspend Function If the host does not support USB Suspend function please disconnect USB_VBUS with additional control circuit to let the module enter into sleep mode Execute AT QSCLK 1 to enable the sleep mode Ensure the MAIN_DTR is held at high level or kept open Disconnect USB_VBUS The following figure ...

Page 27: ...ng the pin to low level can make the module enter airplane mode 3 3 2 Software AT CFUN fun command provides choices of the functionality level through setting fun into 0 1 or 4 AT CFUN 0 minimum functionality mode both U SIM and RF functions are disabled AT CFUN 1 full functionality mode by default AT CFUN 4 airplane mode RF function is disabled 3 4 Power Supply 3 4 1 Power Supply Interfaces The m...

Page 28: ...eferred as the power supply The following figure shows a reference design for 5 V input power source The design uses the LDO MIC29302WU from Micrel company The typical output of the power supply is about 3 8 V and the maximum load current is 3 0 A DC_IN MIC29302WU IN OUT EN GND ADJ 2 4 1 3 5 VBAT 100 nF 470 µF 100 nF 100K 47K 470 µF 330R 51K 1 1 4 7K 47K VBAT_EN Figure 6 Reference Design of Power ...

Page 29: ...ace these capacitors close to the VBAT_BB and VBAT_RF pins The main power supply from an external application has to be a single voltage source and can be expanded to two sub paths with star structure The width of VBAT_BB trace should be no less than 1 mm and the width of VBAT_RF trace should be no less than 2 mm In principle the longer the VBAT trace is the wider it will be In addition in order t...

Page 30: ... of PWRKEY When the module is in power down mode it can be turned on to normal mode by driving the PWRKEY pin to a low level for at least 500 ms It is recommended to use an open drain collector driver to control the PWRKEY A simple reference circuit is illustrated in the following figure PWRKEY 4 7K 47K 10 nF Turn on pulse 500 ms Figure 9 Turning on the Module Using Driving Circuit Pin Name Pin No...

Page 31: ...protection A reference circuit is shown in the following figure PWRKEY M odul e S1 Close to S1 TVS Turn on pulse Figure 10 Turning on the Module with a Button The power up scenario is illustrated in the following figure VIL 0 5 V VBAT PWRKEY 500 ms RESET_N STATUS OD I nactive Active UART NOTE 1 Inactive Active USB 10 s VDD_EXT USB_BOOT 100 ms After this time the pin can be set high level by an ext...

Page 32: ...strated in the following figure Figure 12 Timing of Turning off Module 3 6 2 Turn off the Module with AT Command It is safe to use AT QPOWD to turn off the module which is equal to turn off the module via PWRKEY Pin 1 Make sure that VBAT is stable before pulling down PWRKEY pin It is recommended that the time difference between powering up VBAT and pulling down PWRKEY pin is no less than 30 ms 2 P...

Page 33: ...ctor driver or button can be used to control the RESET_N Reset pulse RESET_N 4 7K 47K 300 ms Figure 13 Reference Circuit of RESET_N with Driving Circuit 1 To avoid damaging internal flash do not switch off the power supply when the module works normally Only after shutting down the module with PWRKEY or AT command can you cut off the power supply 2 When turning off module with the AT command pleas...

Page 34: ...ted in the following figure VIL 0 5 V VBAT Module Status Running RESET_N Baseband restart Baseband resetting 300 ms Figure 15 Timing of Resetting Module 1 Please ensure that there is no large capacitance with the max value exceeding 10 nF on PWRKEY and RESET_N pins 2 RESET_N only resets the internal baseband chip of the module and does not reset the power management chip NOTE ...

Page 35: ...tware debugging and firmware upgrade The following table shows the pin definition of USB interface Table 11 Functions of the USB Interface Pin definition of the USB interface is here as follows Table 12 Pin Definition of USB Interface Functions AT command communication YES Data transmission YES Software debugging YES Firmware upgrade YES Pin Name Pin No I O Description Comment USB_VBUS 71 AI USB c...

Page 36: ...aced close to the module and R1 and R2 should be placed close to each other The extra stubs of trace must be as short as possible The following principles should be complied with when designing the USB interface to meet USB specifications It is important to route the USB signal traces as differential pairs with ground surrounded The impedance of USB differential trace is 90 Ω Do not route signal t...

Page 37: ...ode the module supports firmware upgrade over USB interface Table 13 Pin Definition of USB_BOOT Interface The following figure shows a reference circuit of USB_BOOT interface Module USB_BOOT VDD_EXT 4 7K Test point TVS Close to test point Figure 17 Reference Circuit of USB_BOOT Interface Pin Name Pin No I O Description Comment USB_BOOT 115 DI Forces the module to enter download mode 1 8 V power do...

Page 38: ...Table 14 Pin Definition of U SIM Interface 1 Please make sure that VBAT is stable before pulling down PWRKEY pin It is recommended that the time between powering up VBAT and pulling down PWRKEY pin is no less than 30 ms 2 When using MCU to control module to enter the emergency download mode please follow the above timing sequence It is not recommended to pull up FORCE_USB_BOOT to 1 8 V before powe...

Page 39: ...interface is as follows Module USIM_VDD USIM_GND USIM_RST USIM_CLK USIM_DATA USIM_DET 0R 0R 0R VDD_EXT 51K 100 nF GND GND 33 pF 33 pF 33 pF VCC RST CLK IO VPP GND GND USIM_VDD 15K U SIM Card Connector Figure 19 Reference Circuit of U SIM Interface with an 8 pin U SIM Card Connector USIM_DATA 15 DIO U SIM card data card is supported and can be identified automatically by the module USIM_CLK 16 DO U...

Page 40: ... capacitor does not exceed 1 μF Ensure the ground between the module and the U SIM card connector short and wide Keep the trace width of ground and USIM_VDD no less than 0 5 mm to maintain the same electric potential To avoid cross talk between USIM_DATA and USIM_CLK keep them away from each other and shield them with ground surrounded In order to offer good ESD protection it is recommended to add...

Page 41: ...the MSB In this mode the PCM interface supports 256 kHz 512 kHz 1024 kHz 2048 kHz PCM_CLK at 8 kHz PCM_SYNC and also supports 4069 kHz PCM_CLK at 16 kHz PCM_SYNC The module supports a 16 bit linear encoding format The following figure shows the sequence diagram of short frame mode PCM_SYNC 8 kHz PCM_CLK 2048 kHz PCM_CLK PCM_SYNC PCM_DOUT MSB LSB MSB 125 µs 1 2 256 255 PCM_DIN MSB LSB MSB Figure 21...

Page 42: ...8 V 4 7K 4 7K BCLK LRCK DAC ADC SCL SDA BIAS MICBIAS INP INN LOUTP LOUTN Codec 22R 33 pF 22R 22R 33 pF 22R 33 pF Figure 22 PCM and I2C Interface Circuit Reference Design PCM_DIN 24 DI PCM data input 1 8 V power domain If unused keep it open PCM_DOUT 25 DO PCM data output Pin Name Pin No I O Description Comment I2C_SCL 41 OD I2C serial clock Used for external Codec An external 1 8 V pull up resisto...

Page 43: ...in Definition of Debug UART Interface The module provides a 1 8 V UART interface A level translator should be used if the application is equipped with a 3 3 V UART interface A level translator TXS0108EPWR provided by Texas Instruments is recommended The following figure shows a reference design Pin Name Pin No I O Description Comment MAIN_RI 62 DO Main UART ring indication 1 8 V power domain If un...

Page 44: ... transistor circuit is shown as below For the design of circuits shown in dotted lines please refer to that shown in solid lines but pay attention to the direction of connection MCU ARM TXD RXD VDD_EXT 10K VCC_MCU 4 7K 10K VDD_EXT MAIN_TXD MAIN_RXD MAIN_RTS MAIN_CTS MAIN_DTR MAIN_RI RTS CTS GND GPIO MAIN_DCD Module GPIO EINT VDD_EXT 4 7K GND 1 nF 1 nF Figure 24 Reference Circuit with Transistor Ci...

Page 45: ...NM D2 C3 NM D3 C4 NM D4 C5 NM D5 C6 NM D6 C1 NM D1 C7 10 pF D7 C8 33 pF C9 100 nF C10 100 uF Figure 25 Reference Circuit of SD Card Interface In SD card interface design in order to ensure good communication performance with SD card the following design principles should be complied with Pin Name Pin No I O Description Comment SD_SDIO_CLK 32 DO SD card SDIO clock 1 8 2 8 V power domain If unused k...

Page 46: ...n 15 pF It is important to route the SDIO signal traces with ground surrounded The impedance of SDIO data trace is 50 Ω 10 Keep SDIO signals far away from other sensitive circuits signals such as RF circuits analog signals etc as well as noisy signals such as clock signals DC DC signals etc It is recommended to keep the traces of SD_SDIO_CLK SD_SDIO_DATA 0 3 and SD_SDIO_CMD with equal length the d...

Page 47: ... and NET_STATUS The following tables describe pin definition and logic level changes in different network status Name Min Typ Max Unit ADC0 Voltage Range 0 VBAT_BB V ADC1 Voltage Range 0 VBAT_BB V ADC Resolution 12 bits 1 The input voltage of ADC should not exceed its corresponding voltage range 2 It is prohibited to supply any voltage to ADC pin when VBAT is removed 3 It is recommended to use res...

Page 48: ...an LED indication circuit as below When the module is turned on normally the STATUS will present the low state Except for this the STATUS will present high impedance state The following figure shows different circuit designs of STATUS and you can choose either one according to the application demands Pin Name Status Description NET_MODE Always High Registered on UMTS network Always Low Others NET_...

Page 49: ...URC can be outputted via UART port USB AT port and USB modem port which can be set by AT QURCCFG The default port is USB AT port In addition MAIN_RI behavior can be configured flexibly The MAIN_RI behavior can be changed via AT QCFG See document 2 for details The default behavior of the MAIN_RI is shown as below Table 24 Behaviors of the MAIN_RI The status pin cannot be used as indication of modul...

Page 50: ...Table 26 Operating Frequency of UC200A GL Pin Name Pin No I O Description Comment ANT_MAIN 49 AIO Main antenna interface Only passive antennas are supported Considering authentication requirements it is recommended to reserve diversity positions for overseas versions Operating Frequency Transmit MHz Receive MHz GSM850 824 849 869 894 EGSM900 880 915 925 960 DCS1800 1710 1785 1805 1880 PCS1900 1850...

Page 51: ...m 5 dB EGSM900 33 dBm 2 dB 5 dBm 5 dB DCS1800 30 dBm 2 dB 0 dBm 5 dB PCS1900 30 dBm 2 dB 0 dBm 5 dB GSM850 8 PSK 27 dBm 3 dB 5 dBm 5 dB GSM900 8 PSK 27 dBm 3 dB 5 dBm 5 dB DCS1800 8 PSK 26 dBm 3 dB 0 dBm 5 dB PCS1900 8 PSK 26 dBm 3 dB 0 dBm 5 dB WCDMA B1 B2 B5 B8 24 dBm 1 3 dB 49 dBm In GPRS 4 slots Tx mode the maximum output power is reduced by 4 dB The design conforms to the GSM specification as...

Page 52: ...connection It is recommended to reserve a Π type matching circuit for better RF performance and the Π type matching components C1 R1 C2 should be placed as close to the antenna as possible The capacitors are not mounted by default Frequency Receiving Sensitivity Typ 3GPP Requirement SIMO Primary Diversity SIMO GSM850 TBD 102 dBm EGSM900 TBD 102 dBm DCS1800 TBD 102 dBm PCS1900 TBD 102 dBm WCDMA B1 ...

Page 53: ...led to 50 Ω The impedance of the RF traces is usually determined by the trace width W the materials dielectric constant the height from the reference ground to the signal layer H and the spacing between RF traces and grounds S Microstrip or coplanar waveguide is typically used in RF layout to control characteristic impedance The following are reference designs of microstrip or coplanar waveguide w...

Page 54: ...Hardware_Design 53 79 Figure 30 Coplanar Waveguide Design on a 2 layer PCB Figure 31 Coplanar Waveguide Design on a 4 layer PCB Layer 3 as Reference Ground Figure 32 Coplanar Waveguide Design on a 4 layer PCB Layer 4 as Reference Ground ...

Page 55: ...ones There should be clearance under the signal pin of the antenna connector or solder joint The reference ground of RF traces should be complete Meanwhile ground vias around RF traces and the reference ground improves RF performance The distance between the ground vias and RF traces should be more than two times the width of RF signal traces 2 W Keep RF traces away from interference sources and a...

Page 56: ...connector is used for antenna connection it is recommended to use U FL R SMT connector provided by Hirose Figure 33 Dimensions of U FL R SMT Connector Unit mm U FL LP serial connectors listed in the following figure can be used to match the U FL R SMT Figure 34 Mechanicals of U FL LP Connectors ...

Page 57: ...A Module Series UC200A GL_Hardware_Design 56 79 The following figure describes the space factor of mated connector Figure 35 Space Factor of Mated Connector Unit mm For more details please visit http hirose com ...

Page 58: ...or power supply and voltage on digital and analog pins of the module are listed in the following table Table 30 Absolute Maximum Ratings Parameter Min Max Unit VBAT_RF VBAT_BB 0 3 5 5 V USB_VBUS 0 3 5 5 V Peak Current of VBAT_BB 0 8 A Peak Current of VBAT_RF 1 8 A Voltage on Digital Pins 0 3 2 3 V Voltage at ADC0 0 VBAT_BB V Voltage at ADC1 0 VBAT_BB V ...

Page 59: ...g burst Maximum power control level at EGSM 900 0 0 400 mV IVBAT Peak supply current during transmission slot Maximum power control level at EGSM 900 0 1 8 2 0 A USB_VBUS USB connection detection 3 0 5 0 5 25 V UC200A GL Description Conditions Typ Unit OFF state Power down 11 μA Sleep state AT CFUN 0 USB disconnected TBD mA EGSM900 DRX 2 USB disconnected TBD mA EGSM900 DRX 5 USB disconnected TBD m...

Page 60: ...nected TBD mA WCDMA PF 64 USB connected TBD mA GPRS data transfer EGSM900 4DL 1UL 32 34 dBm TBD mA EGSM900 3DL 2UL 32 31 dBm TBD mA EGSM900 2DL 3UL 31 08 dBm TBD mA EGSM900 1DL 4UL 29 28 dBm TBD mA DCS1800 4DL 1UL 29 65 dBm TBD mA DCS1800 3DL 2UL 29 58 dBm TBD mA DCS1800 2DL 3UL 28 03 dBm TBD mA DCS1800 1DL 4UL 26 16 dBm TBD mA EDGE data transfer EGSM900 4DL 1UL 27 06 dBm TBD mA EGSM900 3DL 2UL 26...

Page 61: ... 20 02 dBm TBD mA WCDMA B8 HSUPA 21 03 dBm TBD mA GSM voice call EGSM900 PCL 5 32 24 dBm TBD mA EGSM900 PCL 12 19 09 dBm TBD mA EGSM900 PCL 19 5 82 dBm TBD mA DCS1800 PCL 0 29 40 dBm TBD mA DCS1800 PCL 7 15 75 dBm TBD mA DCS1800 PCL 15 0 43 dBm TBD mA WCDMA voice call WCDMA B1 22 77 dBm TBD mA WCDMA B5 22 42 dBm TBD mA WCDMA B8 22 43 dBm TBD mA Parameter Description Min Max Unit VIH Input high vol...

Page 62: ...ion assembly and testing of the module adding ESD protective components to the ESD sensitive interfaces and points in the product design ESD characteristics of the module s pins are as follows Parameter Description Min Max Unit USIM_VDD Power supply 1 7 1 9 V VIH Input high voltage 1 2 2 0 V VIL Input low voltage 0 3 0 6 V VOH Output high voltage 1 35 1 8 V VOL Output low voltage 0 3 0 45 V Parame...

Page 63: ...uch as voice SMS data transmission etc without any unrecoverable malfunction Radio spectrum and radio network are not influenced while one or more specifications such as Pout may exceed the specified tolerances of 3GPP When the temperature returns to the operating temperature range the module meets 3GPP specifications again Tested Interfaces Contact Discharge Air Discharge Unit VBAT GND 8 10 kV Al...

Page 64: ...cal Information This chapter describes the mechanical dimensions of the module All dimensions are measured in millimeter mm and the dimensional tolerances are 0 2 mm unless otherwise specified 7 1 Mechanical Dimensions Figure 36 Module Top and Side Dimensions Unit mm ...

Page 65: ...UMTS HSPA Module Series UC200A GL_Hardware_Design 64 79 Figure 37 Module Bottom Dimensions View Unit mm The package warpage level of the module conforms to the JEITA ED 7306 standard NOTE Pin 1 ...

Page 66: ...L_Hardware_Design 65 79 7 2 Recommended Footprint Figure 38 Recommended Footprint Bottom View Keep at least 3 mm between the module and other components on the motherboard to improve soldering quality and maintenance convenience NOTE ...

Page 67: ...n 66 79 7 3 Top and Bottom Views Figure 39 Top and Bottom View of the Module Images above are for illustration purpose only and may differ from the actual module For authentic appearance and label please refer to the module received from Quectel NOTE ...

Page 68: ...than 10 e g a drying cabinet 4 The module should be pre baked to avoid blistering cracks and inner layer separation in PCB under the following circumstances The module is not stored in Recommended Storage Condition Violation of the third requirement above occurs Vacuum sealed packaging is broken or the packaging has been removed for over 24 hours Before module repairing 5 If needed the pre baking ...

Page 69: ...nly after reflow soldering for the other side of PCB has been completed The recommended reflow soldering thermal profile lead free reflow soldering and related parameters are shown below Temp C Reflow Zone Soak Zone 246 200 217 235 C D B A 150 100 Max slope 1 to 3 C s Cooling down slope 1 5 to 3 C s Max slope 2 to 3 C s Figure 40 Recommended Reflow Soldering Thermal Profile 1 To avoid blistering l...

Page 70: ...white rust may be found 3 If a conformal coating is necessary for the module do NOT use any coating material that may chemically react with the PCB or shielding cover and prevent the coating material from flowing into the module 4 Avoid using ultrasonic technology for module cleaning since it can damage crystals inside the module 5 Due to the complexity of the SMT process please contact Quectel Te...

Page 71: ...arriers One reel is 11 88 meters long and contains 250 modules The figures below show the package details measured in mm Figure 41 Carrier Tape Dimension Drawing Table 39 Carrier Tape Dimension Table Unit mm 8 3 1 Plastic Reel Figure 42 Plastic Reel Dimension Drawing W P T A0 B0 K0 K1 F E 44 44 0 35 32 5 29 5 3 0 3 8 20 2 1 75 ...

Page 72: ...aled carrier tape to the plastic reel and use the protective tape for protection 1 plastic reel can load 250 modules Place the packaged plastic reel humidity indicator card and desiccant bag into a vacuum bag vacuumize it Place the vacuum packed plastic reel into the pizza box Put 4 packaged pizza boxes into 1 cartoon box and seal it 1 cartoon box can pack 1000 modules Figure 43 Packaging Process ...

Page 73: ...al 3 Quectel_RF_Layout_Application_Note 4 Quectel_Module_Secondary_SMT_Application_Note Abbreviation Description ADC Analog to Digital Converter AMR WB Adaptive Multi Rate Wideband AON Active Optical Network AP Application Processor bps Bits Per Second BPSK Binary Phase Shift Keying CHAP Challenge Handshake Authentication Protocol CS Coding Scheme CSD Circuit Switched Data CTS Clear To Send DAI Di...

Page 74: ...l Ready EFR Enhanced Full Rate ESD Electrostatic Discharge FDD Frequency Division Duplex FEM Front End Module FR Full Rate GLONASS Global Navigation Satellite System Russia GMSK Gaussian Minimum Shift Keying GNSS Global Navigation Satellite System GPS Global Positioning System GRFC General RF Control HB High Band HPUE High Power User Equipment HR Half Rate HSDPA High Speed Downlink Packet Access H...

Page 75: ... Grid Array LMHB Low Middle High Band LNA Low Noise Amplifier LTE Long Term Evolution MAC Media Access Control MB Middle Band MCU Microcontroller Unit MDC Management Data Clock MDIO Management Data Input Output MHB Middle High Band MIMO Multiple Input Multiple Output MO Mobile Originated MS Mobile Station MT Mobile Terminated NR New Radio NSA Non Stand Alone PA Power Amplifier PAP Password Authent...

Page 76: ...Integrated Circuit PRX Primary Receive QAM Quadrature Amplitude Modulation QPSK Quadrature Phase Shift Keying QZSS Quasi Zenith Satellite System RI Ring Indicator RF Radio Frequency RGMII Reduced Gigabit Media Independent Interface RHCP Right Hand Circularly Polarized Rx Receive SA Stand Alone SCS Sub Carrier Space SD Secure Digital SIMO Single Input Multiple Output SMD Surface Mount Device SMS Sh...

Page 77: ...bile Telecommunications System URC Unsolicited Result Code USB Universal Serial Bus U SIM Universal Subscriber Identity Module VBAT Voltage at Battery Pin Vmax Maximum Voltage Vnom Nominal Voltage Vmin Minimum Voltage VIHmax Maximum High level Input Voltage VIHmin Minimum High level Input Voltage VILmax Maximum Low level Input Voltage VILmin Minimum Low level Input Voltage VImax Absolute Maximum I...

Page 78: ...onfigurations with respect to Part 2 1093 and different antenna configurations 4 For FCC Part 15 31 h and k The host manufacturer is responsible for additional testing to verify compliance as a composite system When testing the host device for compliance with Part 15 Subpart B the host manufacturer is VOLmax Maximum Low level Output Voltage VOLmin Minimum Low level Output Voltage VSWR Voltage Stan...

Page 79: ...d on the outside of the final device that contains the following text Contains FCC ID XMR202112UC200AGL The FCC ID can be used only when all FCC compliance requirements are met In the event that these conditions cannot be met for example certain laptop configurations or co location with another transmitter then the FCC authorization is no longer considered valid and the FCC ID cannot be used on th...

Page 80: ...ent off and on the user is encouraged to try to correct the interference by one of the following measures Reorient or relocate the receiving antenna Increase the separation between the equipment and receiver Connect the equipment into an outlet on a circuit different from that to which the receiver is connected Consult the dealer or an experienced radio TV technician for help Any changes or modifi...

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