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                                                                                                Wi-Fi&Bluetooth Module Series 

FCM561D-P_Hardware_Design

                                                                                                                                                             

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Figure 14: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground) 

 

 

Figure 15: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground) 

 

To ensure RF performance and reliability, follow the principles below in RF layout design: 

 

 

Use an impedance simulation to

ol to control the characteristic impedance of RF traces to 50 Ω. 

 

GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully 

connected to the ground. 

 

The  distance  between  the  RF  pins  and  the  RF  connector  should  be  as  short  as  possible  and  all 

right-angle traces should be changed to curved ones. The recommended trace angle is 135°. 

 

There should be clearance under the signal pin of the antenna connector or solder joint. 

 

The  reference  ground  of  RF  traces  should  be  complete.  In  addition,  adding  some  ground  vias 

around RF traces and the reference ground could help to improve RF performance. The distance 

between the ground vias and RF traces should be at least twice the width of RF signal traces (2 × 

W). 

 

Keep  RF  traces  away  from  interference  sources,  and  avoid  intersection  and  paralleling  between 

traces on adjacent layers.   

 

For more details about RF layout, see 

document [2]

.

 

 

Summary of Contents for FCM561D-P

Page 1: ...FCM561D P Hardware Design Wi Fi Bluetooth Module Series Version 1 0 0 Date 2023 10 27 Status Preliminary...

Page 2: ...h we employ commercially reasonable efforts to provide the best possible experience you hereby acknowledge and agree that this document and related services hereunder are provided to you on an as avai...

Page 3: ...cy To implement module functionality certain device data are uploaded to Quectel s or third party s servers including carriers chipset suppliers or customer designated servers Quectel strictly abiding...

Page 4: ...y cause interference on sensitive medical equipment so please be aware of the restrictions on the use of wireless devices when in hospitals clinics or other healthcare facilities Terminals or mobiles...

Page 5: ...ooth Module Series FCM561D P_Hardware_Design 4 61 About the Document Revision History Version Date Author Description 2023 08 24 Luke FU Creation of the document 1 0 0 2023 10 27 Roshan WENG Jay DONG...

Page 6: ...23 3 4 1 SPIs 23 3 4 2 QSPI 24 3 4 3 UARTs 24 3 4 4 SDIO Interface 25 3 4 5 I2C Interfaces 27 3 4 6 USB Interface 27 3 4 7 CAN Interface 28 3 4 8 LCM Interface 28 3 4 9 Camera Interface 30 3 4 10 PWM...

Page 7: ...atings 45 6 3 Power Consumption 46 6 3 1 Wi Fi Power Consumption 46 6 3 2 Bluetooth Power Consumption 46 6 4 Digital I O Characteristics 47 6 5 ESD Protection 47 7 Mechanical Information 48 7 1 Mechan...

Page 8: ...Definition of Analog Audio Interfaces 32 Table 20 Pin Definition of SAR ADC Interfaces 33 Table 21 SAR ADC Features 33 Table 22 Pin Definition of Touch Sensor Interfaces 34 Table 23 Pin Definition of...

Page 9: ...PCB 41 Figure 13 Coplanar Waveguide Design on a 2 layer PCB 41 Figure 14 Coplanar Waveguide Design on a 4 layer PCB Layer 3 as Reference Ground 42 Figure 15 Coplanar Waveguide Design on a 4 layer PCB...

Page 10: ...t competitiveness and price performance ratio Apply anti copy encryption technology to enhance product safety This document defines FCM561D P in QuecOpen solution and describes its air interfaces and...

Page 11: ...t and so on it indicates that the function feature interface pin AT command argument and so on is under development and currently not supported and the asterisk after a model indicates that the sample...

Page 12: ...e interfaces including SPI QSPI UART SDIO I2C USB CAN LCM Camera PWM and I2S for various applications FCM561D P series is an SMD module with compact packaging It includes 320 MHz RISC V processor Buil...

Page 13: ...etails about the interfaces see Chapter 3 3 and Chapter 3 4 Basic Information Protocols and Standard Wi Fi Protocols IEEE 802 11b g n ax Bluetooth protocol BLE 5 2 All hardware components are fully co...

Page 14: ...GPIO21 28 GPIO22 27 GPIO23 26 MIC_P 24 SPK_P 23 SPK_N 67 GPIO46 66 GPIO47 65 GPIO18 64 GPIO17 63 GPIO15 62 GPIO16 61 GPIO14 76 GND 75 GND 74 GND 73 GPIO9 72 GPIO24 71 GPIO25 70 GPIO26 69 GPIO40 68 GPI...

Page 15: ...nterface 12 PWM interfaces 1 I2S interface and 8 SAR ADC interfaces For more details see Chapter 3 3 and Chapter3 4 3 2 Pin Description Table 4 Parameter Description DC characteristics include power d...

Page 16: ...No I O Description DC Characteristics Comment USB_DP 6 AIO USB 2 0 differential data USB 2 0 compliant Requires 85 100 differential impedance recommended to be 90 Test point must be reserved USB_DM 7...

Page 17: ...purpose input output GPIO16 62 DIO General purpose input output GPIO17 64 DIO General purpose input output GPIO18 65 DIO General purpose input output GPIO19 31 DIO General purpose input output GPIO20...

Page 18: ...ral purpose input output GPIO37 14 DIO General purpose input output GPIO38 16 DIO General purpose input output GPIO39 15 DIO General purpose input output GPIO40 69 DIO General purpose input output GPI...

Page 19: ...dware_Design 18 61 MIC_P 26 AI Microphone analog input MIC_N 25 AI Microphone analog input SPK_P 24 AO Analog audio differential output SPK_N 23 AO Analog audio differential output RESERVED PIN Pin Na...

Page 20: ...0 GPIO No Multiplexing Function 1 Multiplexing Function 2 Multiplexing Function 3 Multiplexing Function 4 Multiplexing Function 5 GPIO0 40 GPIO0 UART2_TXD I2C2_SCL GPIO1 39 GPIO1 UART2_RXD I2C2_SDA G...

Page 21: ...D SPI1_CS ANT_BT_SEL1 LCD_DISP GPIO16 62 GPIO16 SDIO_DATA0 SPI1_MOSI ANT_BT_SEL2 LCD_DE GPIO17 64 GPIO17 SDIO_DATA1 SPI1_MISO ANT_BT_SEL3 LCD_HSYNC GPIO18 65 GPIO18 SDIO_DATA2 LCD_VSYNC GPIO19 31 GPIO...

Page 22: ...GPIO29 55 GPIO29 DVP_PCLK TS3 GPIO30 56 GPIO30 DVP_HSYNC TS4 GPIO31 57 GPIO31 DVP_VSYNC TS5 GPIO32 53 GPIO32 DVP_DATA0 PWM6 TS6 GPIO33 52 GPIO33 DVP_DATA1 PWM7 TS7 GPIO34 54 GPIO34 DVP_DATA2 PWM8 TS8...

Page 23: ...G1 LCD_DATA6 GPIO42 68 GPIO42 I2C2_SCL I2S_DIN LCD_G0 LCD_DATA5 GPIO43 34 GPIO43 I2C2_SDA I2S_DOUT LCD_B4 LCD_DATA4 GPIO44 33 GPIO44 CAN_TXD SPI1_CLK ADC10 LCD_B3 LCD_DATA3 GPIO45 32 GPIO45 CAN_RXD SP...

Page 24: ...nnection between the host and the slave SPI_CS SPI_CLK SPI Host SPI Slave SPI_MOSI SPI_MISO SPI_MOSI SPI_MISO SPI_CS SPI_CLK Figure 2 SPI Connection Pin Name Pin No Multiplexing Function I O Descripti...

Page 25: ...UARTs among which UART1 is default configuration while UART2 and UART3 are multiplexed with GPIOs The interfaces support full duplex asynchronous serial communication at a baud rate up to 2 Mbps UART1...

Page 26: ...ection 3 4 4 SDIO Interface In the case of multiplexing the module provides 1 SDIO 2 0 interface It can be used as a host to read external SD cards or as a slave communicating with an external host It...

Page 27: ...ification it is recommended to adopt the following principles Route the SDIO traces in inner layer of the PCB and surround the traces with ground on that layer and with ground planes above and below T...

Page 28: ...L or bus idle duration is greater than a programmable threshold it will generate interrupt to MCU Table 11 Pin Definition of I2C Interfaces Reserve 1 10 k pull up resistors to VBAT when I2C1 and I2C2...

Page 29: ...8 bit I8080 interface The controller supports conversion from YUV420 to RGB565 in RGB display Table 14 Pin Definition of LCM_RGB Interface USB_DM 7 AIO USB 2 0 differential data impedance recommended...

Page 30: ...68 LCD_G0 DIO RGB green data 0 GPIO43 34 LCD_B4 DIO RGB blue data 4 GPIO44 33 LCD_B3 DIO RGB blue data 3 GPIO45 32 LCD_B2 DIO RGB blue data 2 GPIO46 67 LCD_B1 DIO RGB blue data 1 GPIO47 66 LCD_B0 DIO...

Page 31: ...Y HSYNC and VSYNC level could be set independently Table 16 Pin Definition of Camera DVP Interface GPIO43 34 LCD_DATA4 DIO I8080 data bit 4 GPIO44 33 LCD_DATA3 DIO I8080 data bit 3 GPIO45 32 LCD_DATA2...

Page 32: ...terface multiplexed with GPIOs It supports master and slave modes with sample rates from 8 kHz to 384 kHz The I2S interface supports both PCM mono channel mode and I2S stereo channel mode with program...

Page 33: ...6 speakers with up to 30 pF of load capacitance Table 19 Pin Definition of Analog Audio Interfaces 3 4 13 SAR ADC Interface The module embeds 13 bit general purpose SAR ADC interfaces with programmabl...

Page 34: ...ent GPIO25 71 ADC1 AI General purpose ADC interface Channel 1 GPIO24 72 ADC2 AI General purpose ADC interface Channel 2 GPIO23 27 ADC3 AI General purpose ADC interface Channel 3 GPIO28 10 ADC4 AI Gene...

Page 35: ...r 0 GPIO13 7 TS1 AI Touch sensor 1 GPIO28 10 TS2 AI Touch sensor 2 GPIO29 55 TS3 AI Touch sensor 3 GPIO30 56 TS4 AI Touch sensor 4 GPIO31 57 TS5 AI Touch sensor 5 GPIO32 53 TS6 AI Touch sensor 6 GPIO3...

Page 36: ...better power supply performance it is recommended to parallel a 22 F decoupling capacitor and two filter capacitors 1 F and 100 nF near the module s VBAT pin In addition it is recommended to add a TV...

Page 37: ...AT CHIP_EN 1 s Module Status Booting Active 10 ms Figure 7 Turn on Timing 4 3 Reset When the voltage of CHIP_EN drops below 0 3 V or pull it down for at least 1 ms the module can be reset The referenc...

Page 38: ...HIP_EN is by using a button directly When pressing the button an electrostatic strike may generate from finger Therefore a TVS component shall be placed near the button for ESD protection CHIP_EN S1 C...

Page 39: ...PA3 Personal Operating Mode AP STA AP STA Transmission Data Rate 802 11b 1 Mbps 2 Mbps 5 5 Mbps 11 Mbps 802 11g 6 Mbps 9 Mbps 12 Mbps 18 Mbps 24 Mbps 36 Mbps 48 Mbps 54 Mbps 802 11n HT20 MCS 0 7 HT40...

Page 40: ...ector is not available when the module is designed with ANT_BT antenna interface FCM561D P supports PCB antennasThe impedance of antenna port is 50 802 11n HT20 MCS 0 5 dB 14 90 802 11n HT20 MCS 7 27...

Page 41: ...interface is shown below For better RF performance it is necessary to reserve a matching circuit and add ESD protection components Reserved matching components such as R1 C1 C2 and D1 should be place...

Page 42: ...d to the signal layer H and the spacing between RF traces and grounds S Microstrip or coplanar waveguide is typically used in RF layout to control characteristic impedance The following are reference...

Page 43: ...round The distance between the RF pins and the RF connector should be as short as possible and all right angle traces should be changed to curved ones The recommended trace angle is 135 There should b...

Page 44: ...traces ethernet port and any other metal components on the motherboard should be at least 16 mm All layers in the PCB of the motherboard under the PCB antenna should be designed as a keepout area Fig...

Page 45: ...i Bluetooth Module Series FCM561D P_Hardware_Design 44 65 Do not routing at the RF test point at the bottom of the module to ensure its performances during PCB design Figure 17 Prohibited Area for Rou...

Page 46: ...module are listed in the following table Table 30 Absolute Maximum Ratings Unit V 6 2 Power Supply Ratings Table 31 Module Power Supply Ratings Unit V Parameter Min Max VBAT 0 3 3 6 Voltage at Digita...

Page 47: ...ower Consumption in Non signaling Modes Unit mA Condition IVBAT Typ 2 4 GHz 802 11b Tx 1 Mbps 17 dBm 274 Tx 11 Mbps 17 dBm 274 802 11g Tx 6 Mbps 15 dBm 248 Tx 54 Mbps 14 dBm 248 802 11n Tx HT20 MCS 0...

Page 48: ...s during the development production assembly and testing of the module add ESD protection components to the ESD sensitive interfaces and points in the product design Table 35 ESD Characteristics Unit...

Page 49: ...hanical Information This chapter describes the mechanical dimensions of the module All dimensions are measured in millimeters mm and the dimensional tolerances are 0 2 mm unless otherwise specified 7...

Page 50: ...Wi Fi Bluetooth Module Series FCM561D P_Hardware_Design 49 65 Figure 19 FCM561D P Bottom Dimensions Bottom View The package warpage level of the module conforms to the JEITA ED 7306 standard NOTE...

Page 51: ...1D P_Hardware_Design 50 65 7 2 Recommended Footprint Figure 20 FCM561D P Recommended Footprint Keep at least 3 mm between the module and other components on the motherboard to improve soldering qualit...

Page 52: ...3 Top and Bottom Views Figure 21 FCM561D P Top and Bottom Views PCB Antenna Interface 1 Images above are for illustrative purposes only and may differ from the actual module For authentic appearance...

Page 53: ...e g a dry cabinet 4 The module should be pre baked to avoid blistering cracks and inner layer separation in PCB under the following circumstances The module is not stored in Recommended Storage Condit...

Page 54: ...PCB Apply proper force on the squeegee to produce a clean stencil surface on a single pass To guarantee module soldering quality the thickness of stencil for the module is recommended to be 0 15 0 18...

Page 55: ...ation on the shielding can is still clearly identifiable and the QR code is still readable although white rust may be found 4 If a conformal coating is necessary for the module do NOT use any coating...

Page 56: ...for reference only The appearance and structure of the packaging materials are subject to the actual delivery The module adopts carrier tape packaging and details are as follow 8 3 1 Carrier Tape Car...

Page 57: ...e Series FCM561D P_Hardware_Design 56 65 8 3 2 Plastic Reel Figure 24 Plastic Reel Dimension Drawing Table 38 Plastic Reel Dimension Table Unit mm 8 3 3 Mounting Direction Figure 25 Mounting Direction...

Page 58: ...nd the heat sealed carrier tape on the plastic reel and use the protective tape for protection 1 plastic reel can load 250 modules Place the packaged plastic reel 1 humidity indicator card and 1 desic...

Page 59: ...uectel_Module_SMT_Application_Note Abbreviation Description ADC Analog to Digital Converter AMOLED Active Matrix Organic Light Emitting Diode AP Access Point BLE Bluetooth Low Energy BPSK Binary Phase...

Page 60: ...ncy HT High Throughput I O Input Output I2C Inter Integrated Circuit I2S Inter IC Sound IEEE Institute of Electrical and Electronics Engineers IoT Internet of Things JPEG Joint Photographic Experts Gr...

Page 61: ...Hazardous Substances ROM Read Only Memory RTC Real Time Clock SAR Successive Approximation Register SBC Sub band Coding SCLK Serial Clock SD Secure Digital SDIO Secure Digital Input Output SMD Surface...

Page 62: ...s FCM561D P_Hardware_Design 61 65 Vmin Minimum Voltage Vnom Nominal Voltage Value VOH High level Output Voltage VOL Low level Output Voltage VSWR Voltage Standing Wave Ratio VSYNC Vertical Synchroniza...

Page 63: ...ceiver Connect the equipment into an outlet on a circuit different from that to which the receiver is connected Consult the dealer or an experienced radio TV technician for help The device must not be...

Page 64: ...tennas Antenna Specification are as follows Type PCB Antenna Gain 1 dBi Max This device is intended only for host manufacturers under the following conditions The transmitter module may not be co loca...

Page 65: ...erence and 2 this device must accept any interference received including interference that may cause undesired operation FCC Caution Any changes or modifications not expressly approved by the party re...

Page 66: ...formation warning as show in this manual IC Statement This device complies with Industry Canada license exempt RSS standard s Operation is subject to the following two conditions 1 this device may not...

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