Wi-Fi&Bluetooth Module Series
FC905A_Hardware_Design 28 / 51
3.7. Other Interfaces
3.7.1. WLAN_SLP_CLK
The 32.768 kHz sleep clock is used in low power modes, such as IEEE power saving mode and sleep
mode. It serves as a timer to determine when to wake up the FC905A to receive signals in various power
saving schemes, and to maintain basic logic operations when the module is in sleep mode.
Table 15: Pin Definition of WLAN_SLP_CLK Interface
The following are the recommended selection parameters for the recommended 32.768 kHz crystal:
Table 16: WLAN_SLP_CLK Parameter Recommendation
Pin Name
Pin No.
I/O
Description
WLAN_SLP_CLK
24
DI
External 32.768 kHz low power clock input.
Parameter
Value
Unit
Frequency
32.768
kHz
Frequency accuracy
±200
ppm
Duty cycle
30
–
70
%
Input signal amplitude
200
–
3300
mV, p-p
Signal type
Square wave or sine wave
-
Input impedance
> 100
k
Ω
Crystal load capacitance
< 5
pF
Clock jitter
< 10000
ppm
