Quectel EM121R-GL Hardware Design Download Page 11

Page: 11 / 88

LTE-A Module Series

EM121R-GL Hardware Design

EM121R-GL Hardware Design 10 / 80

Figure Index

Figure 1: Functional Diagram ..................................................................................................................... 18

Figure 2: Pin Assignment ........................................................................................................................... 19

Figure 3: DRX Run Time and Current Consumption in Sleep Mode ......................................................... 26

Figure 4: Sleep Mode Application with USB Remote Wakeup .................................................................. 26

Figure 5: Power Supply Limits during Radio Transmission ....................................................................... 28

Figure 6: Reference Circuit for the VCC .................................................................................................... 28

Figure 7: Reference Circuit for the Power Supply ..................................................................................... 29

Figure 8: Turn on the Module with a Host GPIO ........................................................................................ 30

Figure 9: Turn-on Timing of the Module ..................................................................................................... 30

Figure 10: Turn-off Timing through FULL_CARD_POWER_OFF# ........................................................... 31

Figure 11: Reference Circuit for the RESET# with NPN Driver Circuit ..................................................... 32

Figure 12: Reference Circuit for the RESET# with a Button...................................................................... 32

Figure 13: Reset Timing of the Module ...................................................................................................... 33

Figure 14: Reference Circuit for Normally Closed (U)SIM Card Connector .............................................. 37

Figure 15: Reference Circuit for Normally Open (U)SIM Card Connector ................................................ 37

Figure 16: Reference Circuit for a 6-Pin (U)SIM Card Connector ............................................................. 38

Figure 17: Recommended Compatible Design for (U)SIM2 Interface ....................................................... 38

Figure 18: Reference Circuit for the USB 3.0 & 2.0 Interface.................................................................... 40

Figure 19: PCIe Interface Reference Circuit .............................................................................................. 42

Figure 20: PCIe Power-on Timing Requirements of M.2 Specification ..................................................... 43

Figure 20: PCIe Turn-on Timing of the Module

..................................................................................... 44

Figure 21: PCIe Turn-off Timing through FULL_CARD_POWER_OFF# .................................................. 45

Figure 22: PCIe Reset Timing .................................................................................................................... 45

Figure 23: PCIe D3 Hot State Timing ........................................................................................................ 46

Figure 24: PCIe D3 Cold Timing ................................................................................................................ 47

Figure 25: Primary Mode Timing ................................................................................................................ 48

Figure 26: Auxiliary Mode Timing .............................................................................................................. 48

Figure 27: W_DISABLE1# and W_DISABLE2# Reference Circuit ........................................................... 50

Figure 28: WWAN_LED# Reference Circuit .............................................................................................. 51

Figure 29: WAKE_ON_WAN# Signal Reference Circuit ........................................................................... 52

Figure 31: Recommended Circuit of EM121R-GL Configuration Pins ...................................................... 55

Figure 30: Internal circuit for Active Antenna DC Bias .............................................................................. 63

Figure 33: Antenna Connectors on the EM121R-GL Module .................................................................... 65

Figure 34: EM121R-GL RF Connector Dimensions (Unit: mm) ................................................................ 66

Figure 35: EM121R-GL RF Connector Dimensions (Unit: mm) ................................................................ 66

Figure 36: Specifications of Mating Plugs Using Ø 0.81 mm Coaxial Cables ........................................... 67

Figure 37: Connection between RF Connector and Mating Plug Using Ø 0.81 mm Coaxial Cable ......... 67

Figure 38: Connection between RF Connector and Mating Plug Using Ø 1.13 mm Coaxial Cable ......... 68

Figure 39: Thermal Dissipation Area on Bottom Side of Module .............................................................. 73

Figure 40: Mechanical Dimensions of the Module (Unit: mm) ................................................................... 75

Figure 41: EM121R-GL Top View and Bottom View ................................................................................. 76

Summary of Contents for EM121R-GL

Page 1: ...EM121R GL Hardware Design LTE A Module Series Version 1 0 0 Date 2021 04 07 Status Preliminary ...

Page 2: ...or notice Disclaimer While Quectel has made efforts to ensure that the functions and features under development are free from errors it is possible that these functions and features could contain errors inaccuracies and omissions Unless otherwise provided by valid agreement Quectel makes no warranties of any kind implied or express with respect to the use of features and functions under developmen...

Page 3: ...f Quectel Transmitting reproducing disseminating and editing this document as well as using the content without permission are forbidden Offenders will be held liable for payment of damages All rights are reserved in the event of a patent grant or registration of a utility model or design Copyright Quectel Wireless Solutions Co Ltd 2021 All rights reserved ...

Page 4: ...ess devices may cause interference on sensitive medical equipment so please be aware of the restrictions on the use of wireless devices when in hospitals clinics or other healthcare facilities Cellular terminals or mobiles operating over radio signal and cellular network cannot be guaranteed to connect in certain conditions such as when the mobile bill is unpaid or the U SIM card is invalid When e...

Page 5: ...re Design EM121R GL Hardware Design 4 80 About the Document Revision History Version Date Author Description 2021 04 07 Jim HAN Kingson ZHANG Alex WANG Creation of the document 1 0 0 2021 04 07 Jim HAN Kingson ZHANG Alex WANG Preliminary ...

Page 6: ...rd 24 3 Operating Characteristics 25 3 1 Operating Modes 25 3 1 1 Sleep mode 25 3 1 2 Airplane mode 27 3 2 Communication Interface with the Host 27 3 3 Power Supply 27 3 3 1 Decrease Voltage Drop 28 3 3 2 Reference Design for Power Supply 29 3 4 Turn on 29 3 5 Turn off 31 3 6 Reset 31 4 Application Interfaces 34 4 1 U SIM Interface 34 4 1 1 Pin definition of U SIM 34 4 1 2 U SIM Hot plug 35 4 1 3 ...

Page 7: ...Tuner Control Interface through GPIOs 53 4 7 2 Antenna Tuner Control Interface through RFFE 54 4 8 Configuration Pins 54 5 RF Characteristics 56 5 1 Cellular Antenna Interfaces 56 5 1 1 Connector Definition 56 5 1 2 Operating Frequency 56 5 1 3 Receiving Sensitivity 58 5 1 4 Output Power 59 5 2 GNSS Antenna Interface 62 5 2 1 General Description 62 5 2 2 Connector Definition 63 5 2 3 GNSS Frequenc...

Page 8: ...charge 72 6 5 Thermal Dissipation 72 6 6 Absolute Maximum Ratings 74 6 7 Operating and Storage Temperatures 74 7 Mechanical Dimensions and Packaging 75 7 1 Mechanical Dimensions of the Module 75 7 2 Top and Bottom Views of the Module 76 7 3 M 2 Connector 76 7 4 Packaging 76 8 Appendix References 78 ...

Page 9: ...of PCM Interface 48 Table 20 Pin Definition of Control and Indication Interfaces 49 Table 21 RF Function Status 49 Table 22 GNSS Function Status 50 Table 23 Network Status Indications of WWAN_LED 51 Table 24 State of the WAKE_ON_WAN 52 Table 25 Function of the DPR Signal 52 Table 27 Pin definition of WLAN_PA_EN for EM121R GL 53 Table 28 Pin Definition of COEX Interface 53 Table 29 Pin Definition o...

Page 10: ...0 Table 49 EM121R GL Current Consumption USB Only Version 3 7 V Power Supply 71 Table 50 Logic Levels of Digital I O 1 8 V 71 Table 51 U SIM 1 8 V I O Requirements 71 Table 52 U SIM 3 0 V I O Requirements 71 Table 53 Electrostatic Discharge Characteristics Temperature 25 º C Humidity 40 72 Table 54 Absolute Maximum Ratings 74 Table 55 Operating and Storage Temperatures 74 Table 56 Related Document...

Page 11: ...face 40 Figure 19 PCIe Interface Reference Circuit 42 Figure 20 PCIe Power on Timing Requirements of M 2 Specification 43 Figure 20 PCIe Turn on Timing of the Module 44 Figure 21 PCIe Turn off Timing through FULL_CARD_POWER_OFF 45 Figure 22 PCIe Reset Timing 45 Figure 23 PCIe D3 Hot State Timing 46 Figure 24 PCIe D3 Cold Timing 47 Figure 25 Primary Mode Timing 48 Figure 26 Auxiliary Mode Timing 48...

Page 12: ...LTE A Module Series EM121R GL Hardware Design EM121R GL Hardware Design 11 80 Figure 43 Tray Size Unit mm 77 Figure 44 Tray Packaging Procedure 77 ...

Page 13: ...ication in different fields reference design is also provided for reference Associated with application notes and user guides you can use the module to design and set up mobile applications easily This document is applicable to the EM121R GL module 1 2 Reference Standard The module complies with the following standards PCI Express M 2 Specification Revision 2 0 Version 1 2 PCI Express Base Specifi...

Page 14: ...re interface pin name AT command or argument it indicates that the function feature interface pin name AT command or argument is under development and currently not supported unless otherwise specified Brackets used after a pin enclosing a range of numbers indicate all pin of the same type For example ANTCTL 0 3 refers to all four ANTCTL pins ANTCTL0 ANTCTL1 ANTCTL2 and ANTCTL3 ...

Page 15: ...s only It supports embedded operating systems such as Windows Linux and Android and also provide GNSS 1 and voice functionality 2 to meet specific application demands The following table shows the frequency bands and GNSS types of the module Table 2 Frequency Bands and GNSS Types of EM121R GL Mode Frequency Bands LTE FDD with Rx diversity B1 B2 B3 B4 B5 B7 B8 B12 B13 B14 B18 B19 B20 B25 B26 B28 B2...

Page 16: ... 4 4 V Typical supply voltage 3 7 V U SIM Interface Compliant with ISO IEC 7816 3 Support U SIM card 1 8 3 0 V Support Dual SIM Single Standby USB Interface Compliant with USB 3 0 and 2 0 specifications with maximum transmission rates up to 5 Gbps on USB 3 0 and 480 Mbps on USB 2 0 Used for AT command communication data transmission firmware upgrade software debugging GNSS NMEA sentence output and...

Page 17: ...ss 2 25 5 dBm 1 2 dB Other Bands Class 3 23 dBm 2 dB LTE Features EM121R GL Up to LTE Cat 12 1 4 60 MHz 3CA RF bandwidth Support 2 2 MIMO in DL direction Support uplink QPSK 16QAM and 64QAM modulation Support downlink QPSK 16QAM and 64QAM and 256QAM modulation Data rate up to 600 Mbps DL 150 Mbps UL UMTS Features 3GPP R9 DC HSDPA HSPA HSDPA HSUPA and WCDMA Support QPSK 16QAM and 64QAM modulation D...

Page 18: ...such as voice SMS emergency call etc without any unrecoverable malfunction Radio spectrum and radio network are not influenced while one or more specifications such as Pout may undergo a reduction in value exceeding the specified tolerances of 3GPP When the temperature returns to the normal operating temperature level the module will meet 3GPP specifications again SMS Text and PDU modes Point to p...

Page 19: ... frequency M 2 Key B interface U SIM2 U SIM1 USB 2 0 USB 3 0 PCIe 2 0 1 ANT_GNSS ANT_MAIN 38 4MHz XO Qlink Control Tx PRx DRx PCI Express M 2 Key B Interface FULL_CARD_POWER_OFF W_DISABLE2 WWAN_LED WAKE_ON_WAN RFFE W_DISABLE1 GPIOs ANT_DIV GND RESET VCC SPMI BB_CLK 19 2MHz RF_CLK 38 4MHz EBI1 EBI2 PMIC 4Gb 8 bit NAND Flash 2Gb 16 bit LPDDR4X SDRAM Baseband Transceiver Tx Rx Blocks ET GNSS Figure 1...

Page 20: ...39 USB_SS_RX_P 37 USB_SS_RX_M 35 GND 33 USB_SS_TX_P 31 USB_SS_TX_M 29 GND 27 DPR 25 WAKE_ON_WAN 23 CONFIG_0 21 Notch Notch Notch Notch GND 11 USB_DM 9 USB_DP 7 GND 5 GND 3 CONFIG_3 1 PIN11 PIN10 No Pin Name 74 VCC 72 VCC 70 VCC 68 ANT_CONFIG 66 USIM1_DET 64 COEX_TXD 62 COEX_RXD 60 WLAN_PA_EN 58 RFFE_DATA 56 RFFE_CLK 54 PCIE_WAKE_N 52 PCIE_CLKREQ_N 50 PCIE_RST_N 48 USIM2_VDD 46 USIM2_RST 44 USIM2_C...

Page 21: ...tion Type Description AI Analog Input AO Analog Output AIO Analog Input Output DI Digital Input DO Digital Output DIO Digital Input Output OD Open Drain PI Power Input PO Power Output PU Pull Up PD Pull Down Pin No Pin Name I O Description DC Characteristic Comment 1 CONFIG_3 DO Not connected internally 2 VCC PI Power supply Vmin 3 135 V Vnom 3 7 V Vmax 4 4 V 3 GND Ground 4 VCC PI Power supply Vmi...

Page 22: ...9 USB_DM AIO USB differential data 10 WWAN_LED DO OD RF status indication LED Active LOW VCC 11 GND Ground 12 Notch Notch 13 Notch Notch 14 Notch Notch 15 Notch Notch 16 Notch Notch 17 Notch Notch 18 Notch Notch 19 Notch Notch 20 PCM_CLK DIO PD PCM clock 1 8 V 21 CONFIG_0 DO Not connected internally 22 PCM_DIN DI PD PCM data input 1 8 V 23 WAKE_ON_ WAN DO OD Wake up the host Active LOW 1 8 3 3 V 2...

Page 23: ... 3 0 V 35 USB_SS_RX_M AI USB 3 0 super speed receive 36 USIM1_VDD PO U SIM1 card power supply 1 8 3 0 V 37 USB_SS_RX_P AI USB 3 0 super speed receive 38 NC NC 39 GND Ground 40 USIM2_DET DI PU U SIM2 card hot plug detect 1 8 V Internally pulled up to 1 8 V 1 41 PCIE_TX_M AO PCIe transmit 42 USIM2_DATA DIO PU U SIM2 card data USIM2_VDD 1 8 3 0 V 43 PCIE_TX_P AO PCIe transmit 44 USIM2_CLK DO PD U SIM...

Page 24: ...8 V 60 WLAN_PA_EN DI PD Self protection for QLN4650 control 1 8 V 61 ANTCTL1 DO PD Antenna control 1 8 V 62 COEX_RXD DI PD LTE WLAN coexistence receive 1 8 V 63 ANTCTL2 DO PD Antenna control 1 8 V 64 COEX_TXD DO PD LTE WLAN coexistence transmit 1 8 V 65 ANTCTL3 DO PD Antenna control 1 8 V 66 USIM1_DET DI PU U SIM1 card hot plug detect 1 8 V Internally pulled up to 1 8 V 1 67 RESET DI PU Reset the ...

Page 25: ...r customization 3 3 EM121R GL does not support this function please keep it unconnected 4 Keep all NC reserved and unused pins unconnected 2 6 Evaluation Board To help you develop applications conveniently with EM121R GL Quectel supplies an evaluation board PCIE CARD EVB For more details see document 2 71 GND Ground 72 VCC PI Power supply Vmin 3 135 V Vnom 3 7 V Vmax 4 4 V 73 GND Ground 74 VCC PI ...

Page 26: ...s registered on the network and it is ready to send and receive data Talk Data Network connected In this mode the power consumption is decided by network setting and data transfer rate Minimum Functionality Mode AT CFUN 0 command sets the module to a minimum functionality mode without removing the power supply In this mode both RF function and U SIM card are invalid Airplane Mode AT CFUN 4 command...

Page 27: ...itions must be met to make the module enter sleep mode Execute AT QSCLK 1 command to enable the sleep mode The host s USB bus which is connected to the module s USB interface enters suspend state The following figure shows the connection between the module and the host USB Interface USB Interface Module Host GND GND Figure 4 Sleep Mode Application with USB Remote Wakeup The module and the host wil...

Page 28: ...communication interface between the module and the host It is suggested that USB 2 0 interface be reserved for firmware upgrade PCIe Mode eFuse based Support MBIM QMI QRTR AT Support Non X86 systems and X86 system support BIOS PCIe early initial EM121R GL can also be reprogrammed to PCIe mode based on eFuse If the communication is switched to PCIe mode by burnt eFuse the communication cannot be sw...

Page 29: ...R 0 7 Ω should be used To decrease the power supply is disturbed a multi layer ceramic chip capacitor MLCC array also should be used due to its ultra low ESR It is recommended to use four ceramic capacitors 1 µF 100 nF 33 pF 10 pF for composing the MLCC array and place these capacitors close to VCC pins The width of VCC trace should be no less than 2 5 mm In principle the longer the VCC trace is t...

Page 30: ...A D1 TVS PWR_IN C8 220 μF C11 10 pF C10 33 pF C9 100 nF R1 205k U1 Q1 NPN R8 47k R7 4 7k PWR_EN R4 182k PWR_OUT L1 1 5 μH VIN VIN VIN EN VSNS COMP RT CLK SS PH PH PH BOOT PWRGD GND GND AGND VFB R5 383k 1 R6 100k 1 C6 100 nF PWRGD EP R2 80 6k C7 10 nF R3 10k C4 10 nF C5 NM VFB C2 100 nF C3 33 pF C1 470 μF Figure 7 Reference Circuit for the Power Supply To avoid damaging the internal flash do not sw...

Page 31: ... Turn on the Module with a Host GPIO The timing of turn on scenario is illustrated in the following figure VCC FULL_CARD_POWER_OFF System turn on and booting System booting Inactive Waiting for network registration Module Status T1 USB 2 0 T2 Figure 9 Turn on Timing of the Module Table 9 Turn on Timing of the Module Pin No Pin Name I O Description DC Characteristics Comment 6 FULL_CARD_ POWER_OFF ...

Page 32: ..._CARD_POWER_OFF Turn off procedure Running OFF T1 Figure 10 Turn off Timing through FULL_CARD_POWER_OFF Table 10 Turn off Timing of the Module 3 6 Reset The RESET pin is used to reset the module The module can be reset by driving RESET low voltage for 250 600 ms Table 11 Pin Definition of RESET Symbol Min Typ Max Comment T1 3 s Module turns off Pin No Pin Name I O Description DC Characteristics Co...

Page 33: ...n open collector drain driver or a button can be used to control the RESET pin Host Module RESET Reset Logic GPIO 67 1 8 V Reset pulse 250 600 ms 40K R3 100K R2 1K Q1 NPN R1 1K Figure 11 Reference Circuit for the RESET with NPN Driver Circuit Module RESET 67 250 600 ms S1 TVS 33 pF C1 Note The capacitor C1 is recommended to be less than 47 pF Reset Logic 1 8 V 40K R1 1K Figure 12 Reference Circuit...

Page 34: ...Running Restarting T Figure 13 Reset Timing of the Module Table 12 Reset Timing of the Module Symbol Min Typ Max Comment T 250 ms 500 ms 600 ms RESET should be pulled down for 250 600 ms An asserting time of less than 200 ms is unreliable while that of higher than 600 ms may lead to module reset for several times ...

Page 35: ...figuration pins 4 1 U SIM Interface The U SIM interface circuitry meets ETSI and IMT 2000 requirements Both Class B 3 0 V and Class C 1 8 V U SIM cards are supported and Dual SIM Single Standby function is supported 4 1 1 Pin definition of U SIM Table 13 Pin Definition of U SIM Interfaces Pin No Pin Name I O Description DC Characteristics 36 USIM1_VDD PO U SIM1 card power supply 1 8 3 0 V 34 USIM1...

Page 36: ...akes effect after the module is restarted see document 3 4 1 2 U SIM Hot plug The module supports U SIM card hot plug via U SIM card hot plug detection pins USIM1_DET and USIM2_DET U SIM card insertion is detected by high low level U SIM card hot plug is disabled by default The following command enables U SIM card hot plug function 42 USIM2_DATA DIO PU U SIM2 card data USIM2_VDD 1 8 3 0 V 44 USIM2...

Page 37: ... applicable to this type of connector After executing AT QSIMDET 1 1 to enable the U SIM hot plug when a U SIM card is inserted USIM_DET will change from low to high level when the U SIM card is removed USIM_DET will change from high to low level When the U SIM is absent CD is short circuited to ground and USIM_DET is at low voltage level When the U SIM is inserted CD is open from ground and USIM_...

Page 38: ...of connector After executing AT QSIMDET 1 0 to enable the U SIM hot plug when a U SIM card is inserted USIM_DET will change from high to low level when the U SIM card is removed USIM_DET will change from low to high level When the U SIM is absent CD1 is open from CD2 and USIM_DET is at high voltage level When the U SIM is inserted CD1 is connected to GND and USIM_DET is at low voltage level The fo...

Page 39: ...wo U SIM interfaces U SIM1 interface is used for external U SIM card only and U SIM2 interface is used for external U SIM card or internal eSIM card It should be noted that when the U SIM2 interface is used for an external U SIM card the circuits are the same as those of U SIM1 interface When the U SIM2 interface is used for the internal eSIM card pins 40 42 44 46 and 48 of the modules must be kep...

Page 40: ...e module and the U SIM card connector to suppress EMI such as spurious transmission and to enhance ESD protection The 33 pF capacitors are used to filter out RF interference For USIM_DATA a 10 20 kΩ pull up resistor must be added near the U SIM card connector 4 2 USB Interface The module provides one integrated Universal Serial Bus USB interface which complies with the USB 3 0 2 0 specifications a...

Page 41: ... and R4 must be placed close to the module and the stubs must be minimized in PCB layout Please follow the principles below when designing for the USB interface to meet USB 3 0 and 2 0 specifications Route the USB signal traces as differential pairs with ground surrounded The impedance of differential trace of USB 2 0 and USB 3 0 is 90 Ω For USB 2 0 signal traces the trace length should be less th...

Page 42: ...t Data rate up to 5 Gbps per lane 4 3 1 Pin definition of PCIe Table 15 Pin Definition of PCIe Interface Pin No Pin Name I O Description Comment 55 PCIE_REFCLK_P AIO PCIe reference clock 100 MHz clock frequency Require differential impedance of 95 Ω 53 PCIE_REFCLK_M AIO PCIe reference clock 49 PCIE_RX_P AI PCIe receive Require differential impedance of 95 Ω 47 PCIE_RX_M AI PCIe receive 43 PCIE_TX_...

Page 43: ...face Reference Circuit To ensure the signal integrity of PCIe interface AC coupling capacitors C5 and C6 should be placed close to the host on PCB C1 and C2 have been integrated into the module so do not place these two capacitors on your schematic and PCB The following principles of PCIe interface design should be complied with to meet the PCIe specification Keep the PCIe data and control signals...

Page 44: ...following table is power on timing variables in PCI Express M 2 specification Table 16 Power up Timing of M 2 Specification 4 3 3 1 PCIe Turn on Timing If FULL_CARD_POWER_OFF is de asserted the module will turn on RESET is pulled up inside the module Keep RESET floating or at high level during module power on PCIe turn on timing is illustrated by the following figure Symbol Min Typ Max Comment TPV...

Page 45: ...he Module 4 3 3 2 PCIe Turn off Timing The module will be powered off by cutting off the VCC after pulling down RESET and FULL_CARD_POWER_OFF The module is turned off when FULL_CARD_POWER_OFF is driven low This is a way to power off the module via software Index Min Typ Max Comment T1 0 ms 50 ms The module is turning on T2 0 ms 200 ms De assert RESET after de asserting FULL_CARD_POWER_OFF T3 100 m...

Page 46: ...F 4 3 3 3 PCIe Reset Timing RESET pin is used to reset the module FULL_CARD_POWER_OFF is driven low during system reset VCC H RESET FULL_CARD_POWER_OFF PCIE_RST_N Module State T2 Booting Resetting Active T1 T3 T4 Active T5 Typical 11 6 s Figure 23 PCIe Reset Timing Index Min Typ Max Comment T1 20 ms PCIe interface is disabled by asserting PCIE_RST_N T2 3 s Module is powering off and it stops readi...

Page 47: ...evel VCC H RESET H FULL_CARD_POWER_OFF H PCIE_RST_N H Module State D3 hot D0 D0 Figure 24 PCIe D3 Hot State Timing D3 Cold Timing The module must go through D3 Hot before entering D3 Cold state In D3 Hot state PCIE_RST_N remains at high level then in D3 cold state PCIE_RST_N should be pulled down Index Min Typ Max Comment T1 20 ms PCIe interface is disabled by asserting PCIE_RST_N T2 0 ms Module i...

Page 48: ... edge of the PCM_CLK and transmitted on the rising edge The PCM_SYNC falling edge represents the MSB In this mode the PCM interface supports 256 kHz 512 kHz 1024 kHz or 2048 kHz PCM_CLK at 8 kHz PCM_SYNC and also supports 4096 kHz PCM_CLK at 16 kHz PCM_SYNC In auxiliary mode the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising edge The PCM_SYNC rising edge represent...

Page 49: ... MSB LSB PCM_DOUT MSB MSB LSB PCM_DIN Figure 27 Auxiliary Mode Timing The following table shows the pin definition of PCM interface which can be applied to audio codec design Table 20 Pin Definition of PCM Interface Pin No Pin Name I O Description DC Characteristics 20 PCM_CLK DIO PD PCM clock 1 8 V 22 PCM_DIN DI PD PCM data input 1 8 V 24 PCM_DOUT DO PD PCM data output 1 8 V 28 PCM_SYNC DIO PD PC...

Page 50: ...le to airplane mode In airplane mode the RF function will be disabled The RF function can also be enabled or disabled through software AT commands The following table shows the RF function status of the module Table 22 RF Function Status Pin No Pin Name I O Description DC Characteristics 8 W_DISABLE1 DI OD Airplane mode control Active LOW 1 8 3 3 V 10 WWAN_LED DO OD RF status indication LED Active...

Page 51: ...in the module as shown in the following figure So the control signals GPIO of the host device could be at 1 8 V or 3 3 V voltage level W_DISABLE1 and W_DISABLE2 are active low signals and a reference circuit is shown as below Host Module W_DISABLE2 W_DISABLE1 BB GPIO GPIO 26 8 VDD 1 8 V R5 10k R6 10k Note The voltage level of VCC_IO_HOST could be 1 8 V or 3 3 V typically VCC_IO_HOST R2 100k R3 100...

Page 52: ... Figure 29 WWAN_LED Reference Circuit The following table shows the RF status indicated by WWAN_LED Table 24 Network Status Indications of WWAN_LED 4 5 4 WAKE_ON_WAN The WAKE_ON_WAN is an open drain pin which requires a pull up resistor on the host When a URC returns a 1 s low level pulse signal will be outputted to wake up the host The module operation status indicated by WAKE_ON_WAN is shown bel...

Page 53: ...ty sensor to the module to provide an input trigger which will reduce the output power in radio transmission Table 26 Function of the DPR Signal 4 5 6 WLAN_PA_EN QLN4650 enables self protection circuit integrated inside QLN4650 when WLAN_PA_EN is ON In LTE mode the default WLAN_PA_EN is set to 0 When WLAN_PA_EN 1 the LNA will be in self protection mode WAKE_ON_WAN State Module Operation Status Out...

Page 54: ...te antenna control circuit More details about the interface will be added in the future version of this document 4 7 1 Antenna Tuner Control Interface through GPIOs Table 29 Pin Definition of Antenna Tuner Control Interface through GPIOs Pin No Pin Name I O Description Comment 60 WLAN_PA_EN DI PD Self protection of QLN4650 control 1 8 V Pin No Pin Name I O Description DC Characteristics 62 COEX_RX...

Page 55: ...tion of EM121R GL Configuration Pins The following figure shows a reference circuit for these four pins Pin No Pin Name I O Description DC Characteristics 56 RFFE_CLK DO PD Used for external MIPI IC control 1 8 V 58 RFFE_DATA DIO PD Used for external MIPI IC control 1 8 V Config_0 Pin 21 Config_1 Pin 69 Config_2 Pin 75 Config_3 Pin 1 Module Type and Main Host Interface Port Configuration GND GND N...

Page 56: ...FIG_0 CONFIG_1 CONFIG_2 CONFIG_3 GPIO GPIO GPIO GPIO 21 69 75 1 VCC_IO_HOST R1 100K R2 100K R3 100K R4 100K 0 Ω NM 0 Ω NM 0 Ω 0 Ω Note The voltage level VCC_IO_HOST depends on the host side and could be a 1 8 V or 3 3 V voltage level Figure 31 Recommended Circuit of EM121R GL Configuration Pins ...

Page 57: ...1 Connector Definition Table 33 EM121R GL Connector Definition of Antenna Interfaces 5 1 2 Operating Frequency Table 34 Operating Frequency of EM121R GL Connector Name I O Description Comment Main Antenna AIO Main Antenna connector LTE TRx WCDMA TRx 50 Ω impedance Rx diversity AI Rx diversity Antenna connector LTE DRx WCDMA DRx 50 Ω impedance 3GPP Band Transmit Receive Unit WCDMA B1 1920 1980 2110...

Page 58: ...B7 2500 2570 2620 2690 MHz LTE FDD B8 880 915 925 960 MHz LTE FDD B12 699 716 729 746 MHz LTE FDD B13 777 787 746 756 MHz LTE FDD B14 788 798 758 768 MHz LTE FDD B18 815 830 860 875 MHz LTE FDD B19 830 845 875 890 MHz LTE FDD B20 832 862 791 821 MHz LTE FDD B25 1850 1915 1930 1995 MHz LTE FDD B26 814 849 859 894 MHz LTE FDD B28 703 748 758 803 MHz LTE FDD B29 1 717 728 MHz LTE FDD B30 2305 2315 23...

Page 59: ...Hz LTE TDD B46 1 5150 5925 MHz LTE TDD B48 3550 3700 3550 3700 MHz LTE FDD B66 1710 1780 2110 2200 MHz Frequency Bands RX Sensitivity 1 Typical dBm 3GPP dBm Comment 2 WCDMA B1 110 5 106 7 WCDMA B2 110 104 7 WCDMA B3 111 103 7 WCDMA B4 110 5 106 7 WCDMA B5 111 104 7 WCDMA B6 111 106 7 WCDMA B8 110 5 103 7 WCDMA B19 111 106 7 LTE FDD B1 100 5 96 3 10 MHz LTE FDD B2 100 94 3 10 MHz LTE FDD B3 100 5 9...

Page 60: ...wer of PCIe Only Version LTE FDD B8 101 93 3 10 MHz LTE FDD B12 102 93 3 10 MHz LTE FDD B13 102 93 3 10 MHz LTE FDD B14 101 5 93 3 10 MHz LTE FDD B18 102 96 3 10 MHz LTE FDD B19 102 96 3 10 MHz LTE FDD B20 102 93 3 10 MHz LTE FDD B25 100 5 92 8 10 MHz LTE FDD B26 101 9 93 8 10 MHz LTE FDD B28 102 94 8 10 MHz LTE FDD B30 99 95 3 10 MHz LTE TDD B38 100 1 96 3 10 MHz LTE TDD B39 100 5 96 3 10 MHz LTE...

Page 61: ...2 dB 40 dBm 10 MHz 1RB LTE FDD B4 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB LTE FDD B5 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB LTE FDD B7 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB LTE FDD B8 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB LTE FDD B12 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB LTE FDD B13 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB LTE FDD B14 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB LTE FDD B18 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB LTE F...

Page 62: ...B 40 dBm 10 MHz 1RB LTE FDD B2 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB LTE FDD B3 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB LTE FDD B4 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB LTE FDD B5 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB LTE FDD B7 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB LTE FDD B8 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB LTE FDD B12 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB LTE TDD B38 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB LTE TDD B3...

Page 63: ...m 10 MHz 1RB LTE TDD B39 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB LTE TDD B40 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB LTE TDD B41 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB LTE TDD B41 HPUE QPSK 25 5 dBm 1 2 dB 40 dBm 10 MHz 1RB LTE TDD B48 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB LTE FDD B66 QPSK 23 dBm 2 dB 40 dBm 10 MHz 1RB 5 2 GNSS Antenna Interface 5 2 1 General Description EM121R GL includes a fully integrated globa...

Page 64: ...Frequency Unit GPS L1 Galileo 1575 42 1 023 MHz GPS L5 1176 45 1 023 MHz GLONASS 1601 65 4 15 MHz BeiDou COMPASS 1561 098 2 046 MHz Internal circuit for active antenna DC bias is shown as below GNSS Antenna VDD_1 8V Module ANT_GNSS L1 R1 C1 0R NM NM C2 C3 C4 R2 Figure 32 Internal circuit for Active Antenna DC Bias Connector Name I O Description Comment GNSS Antenna AI GNSS Antenna connector GNSS L...

Page 65: ... Autonomous 1 02 s XTRA enabled 1 03 s Accuracy GNSS CEP 50 Autonomous open sky 2 08 m 1 Tracking sensitivity the minimum GNSS signal power at which the module can maintain lock keep positioning for at least 3 minutes continuously 2 Reacquisition sensitivity the minimum GNSS signal power required for the module to maintain lock within 3 minutes after the loss of lock 3 Cold start sensitivity the m...

Page 66: ...0 Figure 33 Antenna Connectors on the EM121R GL Module 5 3 2 Antenna Connector Size Standard 2 mm 2 mm receptacle antenna connectors are mounted for convenient antenna connection The antenna connector s PN is IPEX 20449 001E and the connector dimensions are illustrated as below ...

Page 67: ... receptacle RF connector used in conjunction with the module will accept two types of mating plugs that will meet a maximum height of 1 2 mm using a Ø 0 81 mm coaxial cable or a maximum height of 1 45 mm utilizing a Ø 1 13 mm coaxial cable The following figure shows the specifications of mating plugs using Ø 0 81 mm coaxial cables Item Specification Nominal Frequency Range DC to 6 GHz Nominal Impe...

Page 68: ...re illustrates the connection between the receptacle RF connector on the module and the mating plug using a Ø 0 81 mm coaxial cable Figure 37 Connection between RF Connector and Mating Plug Using Ø 0 81 mm Coaxial Cable The following figure illustrates the connection between the receptacle RF connector on the module and the mating plug using a Ø 1 13 mm coaxial cable ...

Page 69: ...le Insertion Loss 2 dB 2300 2690 MHz LTE B1 B2 B3 B4 B5 B7 B8 B12 B13 B14 B17 B18 B19 B20 B25 B26 B28 B29 B30 B32 B38 B39 B40 B41 B42 B43 B46 B48 B66 WCDMA B1 B2 B3 B4 B5 B6 B8 B19 Rx diversity VSWR 2 Efficiency 30 Max Input Power 50 W Input Impedance 50 Ω Cable Insertion Loss 1 dB 699 960 MHz Cable Insertion Loss 1 5 dB 1559 2200 MHz Cable Insertion Loss 2 dB 2300 2690 MHz LTE B1 B2 B3 B4 B5 B7 B...

Page 70: ...LTE A Module Series EM121R GL Hardware Design EM121R GL Hardware Design 69 80 LNA Noise Figure 1 5 dB LNA Gain 14 5 5 dB Input Impedance 50 Ω BeiDou COMPASS Galileo 1 VDD voltage is 1 8 V NOTE ...

Page 71: ...The following table shows the power supply requirements of the module Table 43 Power Supply Requirements 6 2 Current Consumption 6 2 1 PCIe Only Version Table 44 EM121R GL Current Consumption PCIe Only Version 3 3 V Power Supply Description Conditions Typ Unit OFF state Power down 66 μA Parameter Description Min Typ Max Unit VCC Power Supply 3 135 3 7 4 4 V Voltage Ripple 30 100 mV Voltage Drop 16...

Page 72: ...iption Conditions Typ Unit OFF state Power down 66 μA Parameter Description Min Max Unit VIH Input high voltage 1 65 2 1 V VIL Input low voltage 0 3 0 54 V VOH Output high voltage 1 3 1 8 V VOL Output low voltage 0 0 4 V Parameter Description Min Max Unit USIM_VDD Power supply 1 65 1 95 V VIH Input high voltage 0 7 USIM_VDD USIM_VDD 0 3 V VIL Input low voltage 0 3 0 2 USIM_VDD V VOH Output high vo...

Page 73: ...k over an extended temperature range To achieve a maximum performance while working under extended temperatures or extreme conditions such as with maximum power or data rate for a long time it is strongly recommended to add a thermal pad or other thermally conductive compounds between the module and the main PCB for thermal dissipation The thermal dissipation area on the bottom i e the area for ad...

Page 74: ...dissipation area is located Select appropriate material thickness and surface for the outer housing of the application device that integrates the module i e the mechanical enclosure to enhance thermal dissipation ability Customers may also need active cooling to dissipate heat of the module If possible add a heatsink on the top of the module A thermal pad should be used between the heatsink and th...

Page 75: ...meet this extended temperature range you need to ensure effective thermal dissipation for example by adding passive or active heatsinks heat pipes vapor chambers etc Within this range the module remains the ability to establish and maintain functions such as voice SMS etc without any unrecoverable malfunction Radio spectrum and radio network are not influenced while one or more specifications such...

Page 76: ...sions and Packaging This chapter mainly describes mechanical dimensions and packaging specifications of EM121R GL All dimensions are measured in mm and the tolerances are 0 2 mm unless otherwise specified 7 1 Mechanical Dimensions of the Module Figure 40 Mechanical Dimensions of the Module Unit mm ...

Page 77: ...llustration purpose only and may differ from the actual module For authentic appearance and label please refer to the module received from Quectel 7 3 M 2 Connector EM121R GL adopts a standard PCI Express M 2 connector which compiles with the directives and standards listed in PCI Express M 2 Specification 7 4 Packaging Modules are packaged in trays The following figure shows the tray size NOTE ...

Page 78: ...age 100 modules at a time tray size 247 mm 172 mm 2 Place an empty tray on the top of the 10 tray stack 3 Fix the stack with masking tape in shape as shown in the following figure 4 Pack the stack with conductive bag and then fix the bag with masking tape 5 Place the list of IMEI No into a small carton 6 Seal the carton and then label the seal with sealing sticker small carton size 250 mm 175 mm 1...

Page 79: ... DFOTA Delta Firmware Upgrade Over The Air DL Downlink DPR Dynamic Power Reduction DRX Discontinuous Reception DRx Diversity Receive SN Document Name Description 1 Quectel_EM121R GL_CA_Feature EM121R GL CA Feature 2 Quectel_PCIe_Card_EVB_User_Guide PCIE card EVB user guide 3 Quectel_EG512R EM1x0R_Series_AT_Commands_ Manual AT commands manual for EG512R and EM1x0R GL series and EM121R GL 4 Quectel_...

Page 80: ... Communications HSPA High Speed Packet Access HSUPA High Speed Uplink Packet Access kbps Kilo Bits Per Second LAA License Assisted Access LED Light Emitting Diode LTE Long Term Evolution Mbps Mega Bits Per Second ME Mobile Equipment MIMO Multiple Input Multiple Output MLCC Multiplayer Ceramic Chip Capacitor MO Mobile Originated MSB Most Significant Bit MT Mobile Terminated PAP Password Authenticat...

Page 81: ... Specific Absorption Rate SMS Short Message Service TCP Transmission Control Protocol TRx Transmit Receive Tx Transmit UART Universal Asynchronous Receiver Transmitter UDP User Datagram Protocol UL Uplink URC Unsolicited Result Code USB Universal Serial Bus U SIM Universal Subscriber Identity Module VIH Input High Voltage Level VIL Input Low Voltage Level VOH Output High Voltage Level VOL Output L...

Page 82: ...al emissions other than what is permitted in Part 15 Subpart B or emissions are complaint with the transmitter s rule s The Grantee will provide guidance to the host manufacturer for Part 15 B requirements if needed Important Note notice that any deviation s from the defined parameters of the antenna trace as described by the instructions require that the host product manufacturer must notify to Q...

Page 83: ...tput power and human exposure to RF radiation maximum antenna gain including cable loss must not exceed Test Mode Antenna Gain dBi Test Mode Antenna Gain dBi WCDMA B2 8 00 LTE B14 5 00 WCDMA B4 8 00 LTE B25 8 00 WCDMA B5 5 00 LTE B26 5 00 LTE B2 8 00 LTE B30 5 00 LTE B4 8 00 LTE B38 8 00 LTE B5 5 00 LTE B41 6 50 LTE B7 8 00 LTE B48 5 00 LTE B12 5 00 LTE B66 8 00 LTE B13 5 00 Note means when using ...

Page 84: ...asures Reorient or relocate the receiving antenna Increase the separation between the equipment and receiver Connect the equipment into an outlet on a circuit different from that to which the receiver is connected Consult the dealer or an experienced radio TV technician for help Any changes or modifications not expressly approved by the party responsible for compliance could void the user s author...

Page 85: ...nna As long as 2 conditions above are met further transmitter test will not be required However the OEM integrator is still responsible for testing their end product for any additional compliance requirements required with this module installed Radiation Exposure Statement This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment This equipment should be ...

Page 86: ...its set forth for an uncontrolled environment This equipment should be installed and operated with minimum distance 20 cm between the radiator your body Déclaration d exposition aux radiations Cet équipement est conforme aux limites d exposition aux rayonnements ISED établies pour un environnement non contrôlé Cet équipement doit être installé et utilisé avec un minimum de 20 cm de distance entre ...

Page 87: ...the transmitter and obtaining a separate Canada authorization NOTE IMPORTANTE Dans le cas où ces conditions ne peuvent être satisfaites par exemple pour certaines configurations d ordinateur portable ou de certaines co localisation avec un autre émetteur l autorisation du Canada n est plus considéré comme valide et l ID IC ne peut pas être utilisé sur le produit final Dans ces circonstances l inté...

Page 88: ... required regulatory information warning as show in this manual Manuel d information à l utilisateur final L intégrateur OEM doit être conscient de ne pas fournir des informations à l utilisateur final quant à la façon d installer ou de supprimer ce module RF dans le manuel de l utilisateur du produit final qui intègre ce module Le manuel de l utilisateur final doit inclure toutes les informations...

Search results

Summary of Contents for EM121R-GL

Reviews:

Quectel EM121R-GL, Hardware Design, Page: 11 / 88

Search results

Summary of Contents for EM121R-GL

Reviews: