Quectel EG06 Series Manual Download

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LTE-A Module Series

EG06 Hardware Design

EG06_Hardware_Design 85 / 89

7.3. Design Effect Drawings of the Module

Figure 46: Top View of the Module

Figure 47: Bottom View of the Module

These are design effect drawings of EG06 module. For more accurate pictures, please refer to the

module that you get from Quectel.

NOTE

Summary of Contents for EG06 Series

Page 1: ...EG06 Manual LTE A Module Series Rev EG06_Hardware_Design_V1 0 Date 2018 05 16 Status Released ...

Page 2: ...www quectel com ...

Page 3: ...VIDED IS BASED UPON CUSTOMERS REQUIREMENTS QUECTEL MAKES EVERY EFFORT TO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE QUECTEL DOES NOT MAKE ANY WARRANTY AS TO THE INFORMATION CONTAINED HEREIN AND DOES NOT ACCEPT ANY LIABILITY FOR ANY INJURY LOSS OR DAMAGE OF ANY KIND INCURRED BY USE OF OR RELIANCE UPON THE INFORMATION ALL INFORMATION SUPPLIED HEREIN IS SUBJECT TO CHANGE WITHOUT PRIOR N...

Page 4: ...LTE A Module Series EG06 Hardware Design EG06_Hardware_Design 2 89 About the Document History Revision Date Author Description 1 0 2018 04 11 King MA Wison HE Initial ...

Page 5: ... USB Remote Wakeup Function 32 3 5 1 3 USB Application with USB Suspend Resume and RI Function 33 3 5 1 4 USB Application without USB Suspend Function 33 3 5 2 Airplane Mode 34 3 6 Power Supply 35 3 6 1 Power Supply Pins 35 3 6 2 Decrease Voltage Drop 36 3 6 3 Reference Design for Power Supply 37 3 6 4 Monitor the Power Supply 37 3 7 Turn on and off Scenarios 37 3 7 1 Turn on Module Using the PWRK...

Page 6: ...ment 69 5 3 2 Recommended RF Connector for Antenna Installation 71 6 Electrical Reliability and Radio Characteristics 74 6 1 Absolute Maximum Ratings 74 6 2 Power Supply Ratings 75 6 3 Operation and Storage Temperatures 75 6 4 Current Consumption 76 6 5 RF Output Power 78 6 6 RF Receiving Sensitivity 78 6 7 Electrostatic Discharge 79 6 8 Thermal Consideration 80 7 Mechanical Dimensions 82 7 1 Mech...

Page 7: ...LTE A Module Series EG06 Hardware Design EG06_Hardware_Design 5 89 10 6 USERS MANUAL OF THE END PRODUCT 94 10 7 LABEL OF THE END PRODUCT 95 ...

Page 8: ...RK CONNECTION STATUS ACTIVITY INDICATOR 52 TABLE 19 WORKING STATE OF THE NETWORK CONNECTION STATUS ACTIVITY INDICATOR 52 TABLE 20 PIN DEFINITION OF STATUS 53 TABLE 21 BEHAVIOR OF THE RI 54 TABLE 22 PIN DEFINITION OF THE PCIE INTERFACE 55 TABLE 23 PIN DEFINITION OF WLAN CONTROL INTERFACE 56 TABLE 24 PIN DEFINITION OF THE SD CARDINTERFACE 57 TABLE 25 PIN DEFINITION OF THE SPI INTERFACE 59 TABLE 26 P...

Page 9: ...LTE A Module Series EG06 Hardware Design EG06_Hardware_Design 7 89 TABLE 42 TERMS AND ABBREVIATIONS 89 ...

Page 10: ...PIN U SIM CARD CONNECTOR 43 FIGURE 19 REFERENCE CIRCUIT OF U SIM INTERFACE WITH A 6 PIN U SIM CARD CONNECTOR 43 FIGURE 20 REFERENCE CIRCUIT OF USB APPLICATION 45 FIGURE 21 REFERENCE CIRCUIT WITH TRANSLATOR CHIP 48 FIGURE 22 REFERENCE CIRCUIT WITH TRANSISTOR CIRCUIT 48 FIGURE 23 PRIMARY MODE TIMING 49 FIGURE 24 AUXILIARY MODE TIMING 50 FIGURE 25 REFERENCE CIRCUIT OF PCM APPLICATION WITH AUDIO CODEC...

Page 11: ...OP OF THE MODULE 81 FIGURE 42 REFERENCED HEATSINK DESIGN HEATSINK AT THE BACKSIDE OF CUSTOMERS PCB 81 FIGURE 43 MODULE TOP AND SIDE DIMENSIONS 82 FIGURE 44 MODULE BOTTOM DIMENSIONS TOP VIEW 83 FIGURE 45 RECOMMENDED FOOTPRINT TOP VIEW 84 FIGURE 46 TOP VIEW OF THE MODULE 85 FIGURE 47 BOTTOM VIEW OF THE MODULE 85 FIGURE 48 REFLOW SOLDERING THERMAL PROFILE 87 FIGURE 49 TAPE SPECIFICATIONS 88 FIGURE 50...

Page 12: ...rdware interface which are connected with customers applications This document can help customers quickly understand module interface specifications electrical and mechanical details as well as other related information of EG06 module Associated with application note and user guide customers can use EG06 module to design and set up mobile applications easily ...

Page 13: ...boarding the aircraft if your device offers an Airplane Mode which must be enabled prior to boarding an aircraft Switch off your wireless device when in hospitals clinics or other health care facilities These requests are designed to prevent possible interference with sensitive medical equipment Cellular terminals or mobiles operatingover radio frequency signal and cellular network cannot be guara...

Page 14: ...LTE A Module Series EG06 Hardware Design EG06_Hardware_Design 12 89 Please do not discard Maybe wireless devices have an impact on the environment so please do not arbitrarily discarded ...

Page 15: ...odule Table 1 Frequency Bands of EG06 Series Module Mode EG06 E EG06 A EG06 LA EG06 APAC EG06 AUTL LTE FDD with Rx diversity B1 B3 B5 B7 B8 B20 B28 B323 B2 B4 B5 B7 B12 B13 B25 B26 B293 B30 B66 B2 B3 B4 B5 B7 B8 B20 B28 B1 B3 B5 B7 B8 B18 B19 B21 B26 B3 B7 B28 LTE TDD with Rx diversity B38 B40 B41 Not supported Not supported B38 B39 B40 B41 Not supported 2 CA B1 B1 B5 B8 B20 B28 B3 B3 B5 B7 B8 B20...

Page 16: ...h can be embedded in applications through its 299 pin LGA pads 2 2 Key Features The following table describes the detailed features of EG06 module Table 2 Key Features of EG06 Module WCDMA with Rx diversity B1 B3 B5 B8 B2 B4 B5 B2 B3 B4 B5 B8 B1 B5 B6 B8 B9 B19 Not supported GNSS GPS GLONASS BeiDou Galileo QZSS GPS GLONASS BeiDou Galileo QZSS GPS GLONASS BeiDou Galileo QZSS GPS GLONASS BeiDou Gali...

Page 17: ...TE AMR AMR WB Support echo cancellation and noise suppression PCM Interface Used for audio function with external codec Support 16 bit linear data format Support long frame synchronization and short frame synchronization Support master and slave modes but must be the master in long frame synchronization USB Interface Compliant with USB 3 0 and 2 0 specifications with maximum transmission rates up ...

Page 18: ... parts Power management Baseband DDR NAND flash Radio frequency Peripheral interfaces PCIe Interface Comply with PCI Express Specification Revision 2 1 Used for Ethernet or WLAN communication Rx diversity Support LTE WCDMA Rx diversity GNSS Features Gen8C Lite of Qualcomm Protocol NMEA 0183 AT Commands Compliant with 3GPP TS 27 007 27 005 and Quectel enhanced AT commands Network Indication Two pin...

Page 19: ...XT USB2 0 3 0 USIM PCM UART I2C RESET_N 19 2M XO STATUS GPIOs Control IQ Control Tx PRx DRx PCIe CLK_OUT SD SPI Figure 1 Functional Diagram means under development 2 4 Evaluation Board In order to help customers develop applications with EG06 Quectel supplies an evaluation board EVB USB to RS 232 converter cable earphone antenna and other peripherals to control or test the module NOTE ...

Page 20: ...an be connected to cellular application platform Sub interfaces included in these pads are described in detail in the following chapters Power supply U SIM interface USB interface UART interfaces PCM and I2C interfaces ADC interfaces Network status indication PCIe interface WLAN control interface SD card interface USB_BOOT interface means under development NOTE ...

Page 21: ...94 232 241 250 259 268 277 286 295 PCIe Pins PCM Pins USIM Pins USB Pins IIC Pins SD Pins ADC Pins UART Pins SPI Pins ANT Pins CLK Pins RESET_N PWRKEY BT_EN PM_ENABLE USIM_PRESENCE USIM_CLK USIM_DATA USIM_VDD USIM_RST USB_VBUS USB_DM USB_DP USB_ID USB_SS_TX_M USB_SS_TX_P USB_SS_RX_P USB_SS_RX_M I2C_SDA I2C_SCL SD_VDD SD_DATA2 SD_DATA3 SD_DATA0 SD_DATA1 SD_CMD SD_DETECT SD_CLK CTS RTS RXD DCD TXD R...

Page 22: ...ional DI Digital input DO Digital output PI Power input PO Power output AI Analog input AO Analog output OD Open drain Table 4 Pin Description Power Supply Pin Name Pin No I O Description DC Characteristics Comment VBAT_BB 155 156 PI Power supply for the module s baseband part Vmax 4 3V Vmin 3 3V Vnorm 3 8V It must be able to provide sufficient current up to 0 8A VBAT_RF 85 86 87 88 PI Power suppl...

Page 23: ...ect VDD_P2 to VDD_EXT GND 10 13 16 17 24 30 31 35 39 44 45 54 55 63 64 69 70 75 76 81 84 89 94 96 100 102 106 108 112 114 116 117 118 120 126 128 133 141 142 148 153 154 157 158 167 174 177 178 181 184 187 191 196 299 Ground Turn on off Pin Name Pin No I O Description DC Characteristics Comment PWRKEY 2 DI Turn on off the module VIHmax 2 1V VIHmin 1 3V VILmax 0 5V The output voltage is 0 8V becaus...

Page 24: ...eristics Comment USB_VBUS 32 PI USB connection detection Vmax 5 25V Vmin 3 0V Vnorm 5 0V USB_DP 34 IO USB 2 0 differential data bus plus Compliant with USB 2 0 standard specifications Require differential impedance of 90Ω USB_DM 33 IO USB 2 0 differential data bus minus Compliant with USB 2 0 standard specifications USB_ID 36 DI OTG identification VILmin 0 3V VILmax 0 6V VIHmin 1 2V VIHmax 2 0V 1 ...

Page 25: ... is supported by the module automatically USIM_ DATA 29 IO Data signal of U SIM card For 1 8V U SIM VILmax 0 36V VIHmin 1 26V VOLmax 0 4V VOHmin 1 45V For 3 0V U SIM VILmax 0 57V VIHmin 2 0V VOLmax 0 4V VOHmin 2 3V USIM_CLK 27 DO Clock signal of U SIM card For 1 8V U SIM VOLmax 0 4V VOHmin 1 45V For 3 0V U SIM VOLmax 0 4V VOHmin 2 3V USIM_RST 28 DO Reset signal of U SIM card For 1 8V U SIM VOLmax ...

Page 26: ... sleep mode control VILmin 0 3V VILmax 0 6V VIHmin 1 2V VIHmax 2 0V 1 8V power domain Pull up by default Pulling down to low level will wake up the module If unused keep it open TXD 60 DO Transmit data VOLmax 0 45V VOHmin 1 35V 1 8V power domain If unused keep it open RXD 58 DI Receive data VILmin 0 3V VILmax 0 6V VIHmin 1 2V VIHmax 2 0V 1 8V power domain If unused keep it open BT Interface Pin Na...

Page 27: ... Pin No I O Description DC Characteristics Comment ADC0 173 AI General purpose analog to digital converter interface Voltage range 0 15V to VBAT_BB If unused keep it open ADC1 175 AI General purpose analog to digital converter interface Voltage range 0 15V to VBAT_BB If unused keep it open PCM and I2C Interface Pin Name Pin No I O Description DC Characteristics Comment PCM_IN 66 DI PCM data input ...

Page 28: ...scription DC Characteristics Comment SPI_CS 79 DO Chip select of SPI interface VOLmax 0 45V VOHmin 1 35V 1 8V power domain If unused keep it open SPI_CLK 80 DO Clock signal of SPI interface VOLmax 0 45V VOHmin 1 35V 1 8V power domain If unused keep it open SPI_MOSI 77 DO Master output slave input of SPI interface VOLmax 0 45V VOHmin 1 35V 1 8V power domain If unused keep it open SPI_MISO 78 DI Mas...

Page 29: ... unused keep it open PCIE_WAKE_ N 190 IO PCIe wake VOLmax 0 45V VOHmin 1 35V VILmin 0 3V VILmax 0 6V VIHmin 1 2V VIHmax 2 0V VIHmax 2 0V In master mode it is an input signal In slave mode it is an output signal If unused keep it open WLAN Control Interface Pin Name Pin No I O Description DC Characteristics Comment PM_ENABLE 5 DO Enable WLAN power VOLmax 0 45V VOHmin 1 35V 1 8V power domain If unus...

Page 30: ...tal controller data bit 0 For1 8V SD VOLmax 0 45V VOHmin 1 4V VILmin 0 3V VILmax 0 58V VIHmin 1 3V VIHmax 2 0V For 3 0V SD VOLmax 0 35V VOHmin 2 15V VILmin 0 3V VILmax 0 7V VIHmin 1 8V VIHmax 3 15V If unused keep it open SD_DATA1 50 IO Secure digital controller data bit 1 If unused keep it open SD_DATA2 47 IO Secure digital controller data bit 2 If unused keep it open SD_DATA3 48 IO Secure digital...

Page 31: ...er domain Pull up by default In low voltage level the module can enter into airplane mode If unused keep it open GPIO1 138 IO General purpose input output port VOLmax 0 45V VOHmin 1 35V VILmin 0 3V VILmax 0 6V VIHmin 1 2V VIHmax 2 0V If unused keep it open GPIO2 139 IO Other Pins Pin Name Pin No I O Description DC Characteristics Comment USB_BOOT 140 DI Force the module to enter into emergency dow...

Page 32: ...tting and data transfer rate Minimum Functionality Mode AT CFUN command can set the module to a minimum functionality mode without removing the power supply In this case both RF function and U SIM card will be invalid Airplane Mode AT CFUN command or W_DISABLE pin can set the module to airplane mode In this case RF function will be invalid Sleep Mode In this mode the current consumption of the mod...

Page 33: ... mode The longer the DRX runs the lower the current consumption will be Current Consumption Run Time DRX OFF ON OFF ON OFF ON OFF ON OFF Figure 3 DRX Run Time and Current Consumption in Sleep Mode The following section describes power saving procedure of EG06 module 3 5 1 1 UART Application If the host communicates with the module via UART interface the following preconditions can let the module e...

Page 34: ...unction the following three preconditions must be met to let the module enter into the sleep mode Execute AT QSCLK 1 command to enable the sleep mode Ensure the DTR is held at high level or keep it open The host s USB bus which is connected with the module s USB interface enters into suspended state The following figure shows the connection between the module and the host USB_VBUS USB_DP USB_DM VD...

Page 35: ...e module s USB interface enters into suspended state The following figure shows the connection between the module and the host USB_VBUS USB_DP USB_DM VDD USB_DP USB_DM Module Host GND GND RI EINT Figure 6 Sleep Mode Application with RI Sending data to EG06 through USB will wake up the module When EG06 has a URC to report RI signal will wake up the host 3 5 1 4 USB Application without USB Suspend F...

Page 36: ...e mode the RF function does not work and all AT commands correlative with RF function will be inaccessible This mode can be set via the following ways Hardware The W_DISABLE pin is pulled up by default driving it to low level will let the module enter into airplane mode Software AT CFUN command provides the choice of the functionality level through setting fun into 0 1 or 4 AT CFUN 0 Minimum funct...

Page 37: ...art Two VBAT_BB pins for module s baseband part The following table shows the details of VBAT pins and ground pins Table 6 VBAT and GND Pins Pin Name Pin No Description Min Typ Max Unit VBAT_RF 85 86 87 88 Power supply for module s RF part 3 3 3 8 4 3 V VBAT_BB 155 156 Power supply for module s baseband part 3 3 3 8 4 3 V GND 10 13 16 17 24 30 31 35 39 44 45 54 55 63 64 69 70 75 76 81 84 89 94 96 ...

Page 38: ...mic capacitors 100nF 33pF 10pF for composing the MLCC array and place these capacitors close to VBAT pins The main power supply from an external application has to be a single voltage source and can be expanded to two sub paths with star structure The width of VBAT_BB trace should be no less than 1mm and the width of VBAT_RF trace should be no less than 2mm In principle the longer the VBAT trace i...

Page 39: ...upply The following figure shows a reference design for 5V input power source The designed output of the power supply is about 3 8V and the maximum load current is 3A DC_IN MIC29302WU IN OUT EN GND ADJ 2 4 1 3 5 VBAT 100nF 470uF 100nF 100K 47K 470uF 470R 51K 1 1 4 7K 47K VBAT_EN Figure 10 Reference Circuit of Power Supply In order to avoid damaging internal flash please do not switch off the power...

Page 40: ... Turn on pulse PWRKEY 4 7K 47K 500ms Figure 11 Turn on the Module Using Driving Circuit Another way to control the PWRKEY is using a button directly When pressing the key electrostatic strike may generate from finger Therefore a TVS component is indispensable to be placed nearby the button for ESD protection A reference circuit is shown in the following figure PWRKEY S1 Close to S1 TVS Figure 12 T...

Page 41: ...own PWRKEY pin The time between them is no less than 30ms 3 7 2 Turn off Module The following procedures can be used to turn off the module Normal power down procedure Turn off the module using the PWRKEY pin Normal power down procedure Turn off the module using AT QPOWD command 3 7 2 1 Turn off Module Using the PWRKEY Pin Driving the PWRKEY pin to a low level voltage for at least 800ms the module...

Page 42: ...etails about AT QPOWD command 1 In order to avoid damaging internal flash please do not switch off the power supply when the module works normally Only after the module is shut down by PWRKEY or AT command the power supply can be cut off 2 When turn off module with AT command please keep PWRKEY at high level after the execution of power off command Otherwise the module will be turned on again afte...

Page 43: ... drain collector driver or button can be used to control the RESET_N Reset pulse RESET_N 4 7K 47K 250ms 600ms Figure 15 Reference Circuit of RESET_N by Using Driving Circuit RESET_N S2 Close to S2 TVS Figure 16 Reference Circuit of RESET_N by Using Button Pin Name Pin No Description DC Characteristics Comment RESET_N 1 Reset the module VIHmax 2 1V VIHmin 1 3V VILmax 0 5V ...

Page 44: ... on PWRKEY and RESET_N pins 3 9 U SIM Interface The U SIM interface circuitry meets ETSI and IMT 2000 requirements Either 1 8V or 3 0V U SIM cards are supported Table 9 Pin Definition of the U SIM Interface Pin Name Pin No I O Description Comment USIM_VDD 26 PO Power supply for U SIM card Either 1 8V or 3 0V is supported by the module automatically USIM_ DATA 29 IO Data signal of U SIM card USIM_C...

Page 45: ...SIM_DATA USIM_PRESENCE 22R 22R 22R VDD_EXT 51K 100nF U SIM Card Connector GND GND VCC RST CLK IO VPP GND USIM_VDD 15K NM NM NM Figure 18 Reference Circuit of U SIM Interface with an 8 Pin U SIM Card Connector If U SIM card detection function is not needed please keep USIM_PRESENCE unconnected A reference circuit for U SIM interface with a 6 pin U SIM card connector is illustrated in the following ...

Page 46: ...ging Please note that the U SIM peripheral circuit should be close to the U SIM card connector The pull up resistor on USIM_DATA line can improve anti jamming capability when long layout trace and sensitive occasion are applied and should be placed close to the U SIM card connector 3 10 USB Interface EG06 provides one integrated Universal Serial Bus USB interface which complies with the USB 3 0 2 ...

Page 47: ...SS_RX_P USB_SS_RX_M C1 C2 C3 C4 100nF 100nF 100nF 100nF USB_SS_RX_P USB_SS_RX_M USB_SS_TX_P USB_SS_TX_M USB_ID GPIO Figure 20 Reference Circuit of USB Application In order to ensure the signal integrity of USB data lines components R1 R2 R3 R4 must be placed close to the module the two capacitors of C1 and C2 have been placed inside the module C3 and C4 components must be placed close to the MCU a...

Page 48: ...a lines Typically the capacitance value should be less than 2 0pF for USB 2 0 and less than 0 4pF for USB 3 0 Keep the ESD protection components to the USB connector as close as possible If possible reserve a 0R resistor on USB_DP and USB_DM lines means under development 3 11 UART Interfaces The module provides three UART interfaces the main UART interface the debug UART interface and the BT UART ...

Page 49: ... power domain DTR 62 DI Data terminal ready Sleep mode control 1 8V power domain TXD 60 DO Transmit data 1 8V power domain RXD 58 DI Receive data 1 8V power domain Pin Name Pin No I O Description Comment DBG_TXD 137 DO Transmit data 1 8V power domain DBG_RXD 136 DI Receive data 1 8V power domain Pin Name Pin No I O Description Comment BT_TXD 163 DO Transmit data 1 8V power domain BT_RXD 165 DI Rec...

Page 50: ...MCU RTS_MCU TXD_MCU DTR_MCU CTS_MCU RXD_MCU VDD_MCU Translator VDD_EXT 10K 120K Figure 21 Reference Circuit with Translator Chip Please visit http www ti com for more information Another example with transistor translation circuit is shown as below The circuit design of dotted line section can refer to the design of solid line section in terms of both module input and output circuit designs but pl...

Page 51: ...he PCM_SYNC falling edge represents the MSB In this mode the PCM interface supports 256kHz 512kHz 1024kHz or 2048kHz PCM_CLK at 8kHz PCM_SYNC and also supports 4096kHz PCM_CLK at 16kHz PCM_SYNC In auxiliary mode the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising edge The PCM_SYNC rising edge represents the MSB In this mode PCM interface operates with a 256kHz PCM_...

Page 52: ..._SYNC Please refer to document 1 for details about AT QDAI command Pin Name Pin No I O Description Comment PCM_IN 66 DI PCM data input 1 8V power domain If unused keep it open PCM_OUT 68 DO PCM data output 1 8V power domain If unused keep it open PCM_SYNC 65 IO PCM data frame synchronization signal 1 8V power domain In master mode it is an output signal In slave mode it is an input signal If unuse...

Page 53: ... for PCM_CLK 2 EG06 works as a master device pertaining to I2C interface 3 13 ADC Interfaces The module provides two Analog to Digital Converters ADC interfaces AT QADC 0 command can be used to read the voltage value on ADC0 pin AT QADC 1 command can be used to read the voltage value on ADC1 pin For more details about these AT QADC command please refer to document 1 In order to improve the accurac...

Page 54: ...module provides two pins which are NET_MODE and NET_STATUS The following tables describe pin definition and logic level changes in different network status Table 18 Pin Definition of Network Connection Status Activity Indicator Table 19 Working State of the Network Connection Status Activity Indicator Parameter Min Typ Max Unit ADC0 Voltage Range 0 15 VBAT_BB V ADC1 Voltage Range 0 15 VBAT_BB V AD...

Page 55: ...indicator It will output high level when module is powered on The following table describes pin definition of STATUS Table 20 Pin Definition of STATUS Always Low Others NET_STATUS Flicker slowly 200ms High 1800ms Low Network searching Flicker slowly 1800ms High 200ms Low Idle Flicker quickly 125ms High 125ms Low Data transfer is ongoing Always High Voice calling Pin Name Pin No I O Description Com...

Page 56: ...is presented the URC will trigger the behavior of RI pin The URC can be output from UART port USB AT port and USB modem port by AT QURCCFG command The default port is USB AT port In addition RI behavior can be configured flexibly The default behavior of the RI is shown as below Table 21 Behavior of the RI State Response Idle RI keeps at high level URC RI outputs 120ms low pulse when a new URC retu...

Page 57: ... Name Pin No I O Description Comment Control Signal Part PCIE_REF CLK_P 179 AO Output PCIe reference clock plus If unused keep it open PCIE_REF CLK_M 180 AO Output PCIe reference clock minus If unused keep it open PCIE_TX_M 182 AO PCIe transmit minus If unused keep it open PCIE_TX_P 183 AO PCIe transmit plus If unused keep it open PCIE_RX_M 185 AI PCIe receive minus If unused keep it open PCIE_RX_...

Page 58: ...les to minimize unbalanced asymmetric coupling PCIe data traces must not be routed under components or crossing other traces means under development 3 18 WLAN Control Interface EG06 provides a low power PCIe interface and a control interface for WLAN design The following table shows the pin definition of WLAN control interface Table 23 Pin Definition of WLAN Control Interface Pin Name Pin No I O D...

Page 59: ...I O Description Comment SD_DATA3 48 IO Secure digital controller data bit 3 SD_DATA2 47 IO Secure digital controller data bit 2 SD_DATA1 50 IO Secure digital controller data bit 1 SD_DATA0 49 IO Secure digital controller data bit 0 SD_CLK 53 DO Serial clock signal for SD card SD_CMD 51 IO Command signal for SD card SD_VDD 46 PO Power supply for pull up voltage of SD bus 1 8V 2 85V configurable out...

Page 60: ...lue of these resistors is among 10kΩ 100kΩ and the recommended value is 100kΩ In order to improve signal quality it is recommended to add 0Ω resistors R1 R6 in series between the module and the SD card The bypass capacitors C1 C6 are reserved and not mounted by default All resistors and bypass capacitors should be placed close to the module In order to offer good ESD protection it is recommended t...

Page 61: ... figure shows the timing relationship of SPI interface The related parameters of SPI timing is shown as the following table SPI_CS_N SPI_CLK SPI_MOSI MSB 1 2 SPI_MISO 3 T t mov 4 t mis t mih t ch t cl Figure 29 SPI Interface Timing Pin Name Pin No I O Description Comment SPI_CS 79 DO Chip select of SPI interface 1 8V power domain If unused keep them open SPI_MOSI 77 DO Master output slave input of...

Page 62: ...SPI_MISO_MCU SPI_MOSI_MCU VDD_MCU Translator Figure 30 SPI Interface Reference Circuit with a Level Translator 3 21 USB_BOOT Interface EG06 provides a USB_BOOT pin Developers can pull up USB_BOOT to VDD_EXT before powering on the module thus the module will enter into emergency download mode when powered on In this mode the module supports firmware upgrade over USB interface Parameter Description ...

Page 63: ... figure shows a reference circuit of USB_BOOT interface Module USB_BOOT VDD_EXT 10K Test point TVS Close to module Figure 31 Reference Circuit of USB_BOOT Interface Pin Name Pin No I O Description Comment USB_BOOT 140 DI Force the module to enter into emergency download mode 1 8V power domain Active high If unused keep it open ...

Page 64: ...erface by default By default EG06 GNSS engine is switched off It has to be switched on via AT command For more details about GNSS engine technology and configurations please refer to document 2 4 2 GNSS Performance The following table shows GNSS performance of EG06 Table 28 GNSS Performance Parameter Description Conditions Typ Unit Sensitivity GNSS Cold start Autonomous TBD dBm Reacquisition Auton...

Page 65: ...start command 4 3 Layout Guidelines The following layout guidelines should be taken into account in customers design Maximize the distance among GNSS antenna main antenna and Rx diversity antenna Digital circuits such as U SIM card USB interface camera module display connector and SD card should be kept away from the antennas Use ground vias around the GNSS trace and sensitive analog signal traces...

Page 66: ...n Definition The pin definition of main antenna and Rx diversity antenna interfaces are shown below Table 29 Pin Definition of the RF Antenna 5 1 2 Operating Frequency Table 30 Module Operating Frequencies Pin Name Pin No I O Description Comment ANT_MAIN 107 IO Main antenna pad 50Ω impedance ANT_DIV 127 AI Receive diversity antenna pad 50Ω impedance 3GPP Band Transmit Receive Unit WCDMA B1 1920 19...

Page 67: ... 2570 2620 2690 MHz LTE B8 880 915 925 960 MHz LTE B12 699 716 729 746 MHz LTE B13 777 787 746 756 MHz LTE B18 815 830 860 875 MHz LTE B19 830 845 875 890 MHz LTE B20 832 862 791 821 MHz LTE B21 1447 9 1462 9 1495 9 1510 9 MHz LTE B25 1850 1915 1930 1995 MHz LTE B26 814 849 859 894 MHz LTE B28 703 748 758 803 MHz LTE B29 716 728 MHz LTE B30 2305 2315 2350 2360 MHz LTE B32 1452 1496 MHz LTE B38 257...

Page 68: ...DIV function is enabled by default AT QCFG diversity 0 command can be used to disable receive diversity 3 Place the π type matching components R1 C1 C2 and R2 C3 C4 as close to the antenna as possible 5 1 4 Reference Design of RF Layout For user s PCB the characteristic impedance of all RF traces should be controlled as 50Ω The impedance of the RF traces is usually determined by the trace width W ...

Page 69: ...are Design EG06_Hardware_Design 67 89 Figure 33 Microstrip Line Design on a 2 layer PCB Figure 34 Coplanar Waveguide Line Design on a 2 layer PCB Figure 35 Coplanar Waveguide Line Design on a 4 layer PCB Layer 3 as Reference Ground ...

Page 70: ...ible and all the right angle traces should be changed to curved ones There should be clearance area under the signal pin of the antenna connector or solder joint The reference ground of RF traces should be complete Meanwhile adding some ground vias around RF traces and the reference ground could help to improve RF performance The distance between the ground vias and RF traces should be no less tha...

Page 71: ...ntenna 1 An external LDO can be selected to supply power according to the active antenna requirement 2 If the module is designed with a passive antenna then the VDD circuit is not needed 5 3 Antenna Installation 5 3 1 Antenna Requirement The following table shows the requirements on main antenna Rx diversity antenna and GNSS antenna Type Frequency Unit GPS Galileo QZSS 1575 42 1 023 MHz GLONASS 15...

Page 72: ...ance 50Ω Gain WCDMA Band2 2dBi WCDMA Band4 2dBi WCDMA Band5 3dBi LTE B2 2dBi LTE B4 2dBi LTE B5 3dBi LTE B7 2dBi LTE B12 3dBi LTE B13 3dBi LTE B25 2dBi LTE B26 3dBi LTE B30 0dBi LTE B66 2dBi Cable insertion loss 1dB WCDMA B5 B6 B8 B19 LTE B5 B8 B12 B13 B18 B19 B20 B26 B28 B29 Cable insertion loss 1 5dB WCDMA B1 B2 B3 B4 B9 LTE B1 B2 B3 B4 B21 B25 B66 Cable insertion loss 2dB LTE B7 B38 B40 B41 B30...

Page 73: ...ector for Antenna Installation If RF connector is used for antenna connection it is recommended to use the U FL R SMT connector provided by Hirose Figure 38 Dimensions of the U FL R SMT Connector Unit mm U FL LP serial connector listed in the following figure can be used to match the U FL R SMT ...

Page 74: ...LTE A Module Series EG06 Hardware Design EG06_Hardware_Design 72 89 Figure 39 Mechanicals of U FL LP Connectors ...

Page 75: ...es EG06 Hardware Design EG06_Hardware_Design 73 89 The following figure describes the space factor of mated connector Figure 40 Space Factor of Mated Connector Unit mm For more details please visit https www hirose com ...

Page 76: ... ratings for power supply and voltage on digital and analog pins of the module are listed in the following table Table 34 Absolute Maximum Ratings Parameter Min Max Unit VBAT_RF VBAT_BB 0 3 4 7 V USB_VBUS 0 3 5 5 V Peak Current of VBAT_BB 0 0 8 A Peak Current of VBAT_RF 0 1 A Voltage at Digital Pins 0 3 2 3 V Voltage at ADC0 0 VBAT_BB V Voltage at ADC1 0 VBAT_BB V ...

Page 77: ...l etc There is no unrecoverable malfunction There are also no effects on radio spectrum and no harm to radio network Only one or more parameters like Pout might reduce in their value and exceed the specified tolerances When the temperature returns to the normal operating temperature levels the module will meet 3GPP specifications again Parameter Description Conditions Min Typ Max Unit VBAT VBAT_BB...

Page 78: ...USB disconnected 2 1 mA LTE FDD PF 128 USB disconnected 1 5 mA LTE TDD PF 32 USB disconnected 3 3 mA LTE TDD PF 64 USB disconnected 2 1 mA LTE TDD PF 128 USB disconnected 1 5 mA Idle state WCDMA PF 64 USB disconnected 18 mA WCDMA PF 64 USB connected 29 mA LTE FDD PF 64 USB disconnected 18 mA LTE FDD PF 64 USB connected 28 mA LTE TDD PF 64 USB disconnected 18 mA LTE TDD PF 64 USB connected 28 mA WC...

Page 79: ...LTE FDD B28 CH27460 23 01dBm 711 mA LTE TDD B38 CH38000 23 88dBm 383 4 mA LTE TDD B40 CH39150 23 67dBm 341 3 mA LTE TDD B41 CH40740 23 88dBm 375 3 mA 2 CA data transfer LTE FDD B1 B1 21 05dBm 618 7 mA LTE FDD B1 B5 21 07dBm 769 9 mA LTE FDD B1 B8 21 91dBm 619 1 mA LTE FDD B1 B20 20 91dBm 633 mA LTE FDD B1 B28 21 09dBm 746 8 mA LTE FDD B3 B5 21 18dBm 751 mA LTE FDD B3 B7 21 1dBm 789 1 mA LTE FDD B3...

Page 80: ... 33dBm 881 7 mA LTE FDD B5 B32 20 91dBm 663 4 mA LTE FDD B8 B32 20 88dBm 680 mA LTE FDD B20 B32 20 88dBm 693 mA LTE FDD B28 B32 21 1dBm 777 6 mA LTE TDD B38 B38 21 3dBm 400 5 mA LTE TDD B40 B40 20 99dBm 369 3 mA LTE TDD B41 B41 21 25dBm 403 9 mA WCDMA voice call WCDMA B1 CH10700 22 83dBm 450 3 mA WCDMA B3 CH1338 22 97dBm 650 3 mA WCDMA B5 CH4407 22 75dBm 556 3 mA WCDMA B8 CH3012 22 89dBm 568 mA Fr...

Page 81: ...ng and operation of any application that incorporates the module The following table shows the module electrostatic discharge characteristics Frequency Primary Diversity SIMO1 3GPP SIMO WCDMA B1 109 5dBm 106 7dBm WCDMA B3 109 5dBm 103 7dBm WCDMA B5 109 0dBm 104 7dBm WCDMA B8 110 5dBm 103 7dBm LTE FDD B1 10M 97 2dBm 98 8dBm 101 5dBm 96 3dBm LTE FDD B3 10M 98 5dBm 97 5dBm 101 5dBm 93 3dBm LTE FDD B5...

Page 82: ...ence ground of the area where the module is mounted should be complete and add ground vias as many as possible for better heat dissipation Make sure the ground pads of the module and PCB are fully connected According to customers application demands the heatsink can be mounted on the top of the module or the opposite side of the PCB area where the module is mounted or both of them The heatsink sho...

Page 83: ...ing Cover Figure 42 Referenced Heatsink Design Heatsink at the Backside of Customers PCB 1 Make sure that customers PCB design provides sufficient cooling for the module proper mounting heatsinks and active cooling may be required depending on the integrated application 2 In order to protect the components from damage the thermal design should be maximally optimized to make sure the module s inter...

Page 84: ... Mechanical Dimensions This chapter describes the mechanical dimensions of the module All dimensions are measured in mm and the tolerances for dimensions without tolerance values are 0 05mm 7 1 Mechanical Dimensions of the Module Figure 43 Module Top and Side Dimensions ...

Page 85: ...LTE A Module Series EG06 Hardware Design EG06_Hardware_Design 83 89 Figure 44 Module Bottom Dimensions Top View ...

Page 86: ...Hardware Design EG06_Hardware_Design 84 89 7 2 Recommended Footprint Figure 45 Recommended Footprint Top View For easy maintenance of the module please keep about 3mm between the module and other components in the host PCB NOTE ...

Page 87: ..._Design 85 89 7 3 Design Effect Drawings of the Module Figure 46 Top View of the Module Figure 47 Bottom View of the Module These are design effect drawings of EG06 module For more accurate pictures please refer to the module that you get from Quectel NOTE ...

Page 88: ...60 RH Stored at 10 RH 3 Devices require baking before mounting if any circumstance below occurs When the ambient temperature is 23º C 5º C and the humidity indicator card shows the humidity is 10 before opening the vacuum sealed bag Device mounting cannot be finished within 168 hours at factory conditions of 30º C 60 RH Stored at 10 RH after the vacuum sealed bag is opened 4 If baking is required ...

Page 89: ...the peak reflow temperature is 235º C 245º C for SnAg3 0Cu0 5 alloy The absolute max reflow temperature is 260º C To avoid damage to the module caused by repeated heating it is suggested that the module should be mounted after reflow soldering for the other side of PCB has been completed Recommended reflow soldering thermal profile is shown below Time 50 100 150 200 250 300 50 100 150 200 250 160º...

Page 90: ...LTE A Module Series EG06 Hardware Design EG06_Hardware_Design 88 89 Figure 49 Tape Specifications Figure 50 Reel Specifications ...

Page 91: ...al 3 Quectel_Module_Secondary_SMT_User_Guide Module Secondary SMT User Guide 4 Quectel_EG06_Reference_Design EG06 Reference Design 5 Quectel_RF_Layout_Application_Note RF Layout Application Note Abbreviation Description AMR Adaptive Multi rate bps Bits Per Second CHAP Challenge Handshake Authentication Protocol CS Coding Scheme CSD Circuit Switched Data CTS Clear To Send DC HSPA Dual carrier High ...

Page 92: ...n Minimum Shift Keying GNSS Global Navigation Satellite System GPS Global Positioning System HR Half Rate HSPA High Speed Packet Access HSDPA High Speed Downlink Packet Access HSUPA High Speed Uplink Packet Access I O Input Output Inorm Normal Current LED Light Emitting Diode LNA Low Noise Amplifier LTE Long Term Evolution MIMO Multiple Input Multiple Output MO Mobile Originated MS Mobile Station ...

Page 93: ...ing TDMA Time Division Multiple Access TD SCDMA Time Division Synchronous Code Division Multiple Access Tx Transmitting Direction UL Uplink UMTS Universal Mobile Telecommunications System URC Unsolicited Result Code U SIM Universal Subscriber Identity Module Vmax Maximum Voltage Value Vnorm Normal Voltage Value Vmin Minimum Voltage Value VIHmax Maximum Input High Level Voltage Value VIHmin Minimum...

Page 94: ...Value VOHmax Maximum Output High Level Voltage Value VOHmin Minimum Output High Level Voltage Value VOLmax Maximum Output Low Level Voltage Value VOLmin Minimum Output Low Level Voltage Value VSWR Voltage Standing Wave Ratio WCDMA Wideband Code Division Multiple Access WLAN Wireless Local Area Network ...

Page 95: ...ined by turning the equipment off and on the user is encouraged to try to correct the interference by one or more of the following measures Reorient or relocate the receiving antenna Increase the separation between the equipment and receiver Connect the equipment into an outlet on a circuit different from that to which the receiver is connected Consult the dealer or an experienced radio TV technic...

Page 96: ...doit pas être inférieure à20 cm 8 pouces pendant le fonctionnement normal 10 5 IMPORTANT NOTE This module is intended for OEM integrator The OEM integrator is still responsible for the FCC compliance requirement of the end product which integrates this module 20cm minimum distance has to be able to be maintained between the antenna and the users for the host this module is integrated into Under su...

Page 97: ... 15 19 statement has to also be available on the label This device complies with Part 15 of FCC rules Operation is subject to the following two conditions 1 this device may not cause harmful interference and 2 this device must accept any interference received including interference that may cause undesired operation The Innovation Science and Economic Development Canada certification label of a mo...

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