LPWA Module Series
BG950A-GL&BG951A-GL_Hardware_Design
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e-l-DRX mode, in which case the main UART interface is inaccessible.
1. Send
AT+CPSMS=0
to disable PSM mode.
2. Send
AT+CEDRXS=1
to enable e-l-DRX mode.
3. Send
AT+QSCLK=2
to enable sleep mode.
4. Drive MAIN_DTR high.
5. Drive PON_TRIG low.
1. See
document [3]
for details about the above AT commands.
2. Follow the steps for exiting sleep mode to exit e-I-DRX.
3.5. Sleep Mode
BG950A-GL/BG951A-GL can reduce their current consumption to a lower value during the sleep mode.
The following sub-chapter describes the power saving procedures of BG950A-GL & BG951A-GL.
3.5.1. UART Application Scenario
If the host communicates with the module via main UART interface, perform the steps below in sequence
to let the module enter sleep mode, in which case the main UART interface is not accessible.
1. Send
AT+CFUN=0
to set the module into minimum function mode.
2. Drive MAIN_DTR low.
3. Execute
AT+QSCLK=2
to enable sleep mode.
4. Drive MAIN_DTR high.
5. Drive PON_TRIG low.
When the module is in sleep mode, perform the steps below in sequence to let the module exit sleep
mode.
Drive PON_TRIG high.
Drive MAIN_DTR low.
Execute
AT+QSCLK=0
to disable sleep mode.
Send
AT+CFUN=1
to set the module into minimum function mode.
Drive MAIN_DTR high.
The figure illustrates the connection between the module and the host.
NOTE
