LPWA Module Series
BG772A-GL Hardware Design
BG772A-GL_Hardware_Design
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The default MAIN_RI behaviors can be configured flexibly by
AT+QCFG="urc/ri/ring"*
command. For
more details about
AT+QCFG
, see
document [3]
.
A URC can be outputted from UART port, through configuration via
AT+QURCCFG
.
3.16. ADC Interfaces*
The module provides two analog-to-digital converter (ADC) interfaces.
AT+QADC=0
can be used to read
the voltage value on ADC0 pin.
AT+QADC=1
be used to read the voltage value on ADC1 pin. For more
details about the AT command, see
document [4]
.
To improve the accuracy of ADC voltage values, the trace of ADC should be surrounded with ground.
Table 21: Pin Definition of ADC Interfaces
The following table describes the characteristics of ADC interfaces.
Table 22: Characteristics of ADC Interfaces
Pin Name
Pin No.
I/O
Description
ADC0
17
AI
General-purpose ADC interface
ADC1
18
AI
General-purpose ADC interface
Parameter
Min.
Typ.
Max.
Unit
Voltage Range
0
1.8
V
Resolution
6
12
bit
Input Resistance
0.5
kΩ
NOTE
