BIOS
BIOS U
PDATE
V
IA
BMC I
NSTRUCTIONS
(O
PTIONAL
)
2-17
BIOS Update Via BMC Instructions (Optional)
In order to prevent BIOS corruption during upgrade process due to power failure or unex-
pected interrupt, “
BIOS update via BMC instructions
” provides a safe mechanism which
allow server manager to rebuild server BIOS through BMC.
In the general usage of BIOS update, BIOS may be corruption during flash programing pro-
cedure due to power failure, unexpected interrupt or somehow new BIOS couldn’t func-
tion properly in current motherboard. The failure symptom may be system couldn’t
complete POST or system stop somewhere with CPU exception & unexpected hardware
error. In order to rebuild BIOS back functionality, remote server manager could provide a
safety, health and reliable BIOS image to server BMC and demand BMC to program whole
BIOS flash chip through SPI interface access.
This is BMC independent feature but must consider to hardware requirement as below.
BMC support SPI interface program circuit.
Intel ME must run with “
Powered in S0/S1 Only”
Whenever host OS goes to sleep
(state S3, S4, S5) ME is powered down. (Intel platform only)
System must be DC OFF without having any SPI access when BMC performs BIOS
programing.
Figure 2-8.
Block diagram of BMC/BIOS/ME
Figure 2-9.
User interface of server manager webUI
