Chapter 2
31
KEEX-6100 Series User’s Manual
Table 25 CN3 Backlight Power Output Wafer for LVDS1
Pin
Signal Name
1
BL_ADJ_PWM *
2
BL_ADJ_VOL *
3
GND
4
+5V / +12V **
5
+5V / +12V **
6
GND
7
BL_EN***
Pitch:1.25mm [YIMTEX 501MW1X07MTR-1R]
*
烉
BL_ADJ can be setting in BIOS setup.
**
烉
Backlight Power can be selected by JP3.
***
烉
BL_EN can be selected by JP4.
Table 26 CN4 SIM Interface Wafer for MPCIE1
Pin
Signal Name
1
UIM_PWR
2
UIM_DATA
3
UIM_RESET
4
UIM_VPP
5
UIM_CLK
6
GND
Pitch:1.25mm [Pinrex 712-73-06TWB0]
Table 27 CN5 USB 2.0 Port 2, 3 Pin Header
6
1
3
10
4
5
2
8
7
Pin
Signal Name
Pin
Signal Name
1
+USBVCC
2
+USBVCC
3
USB_A-
4
USB_B-
5
USB_A+
6
USB_B+
7
GND
8
GND
9
KEY
10
GND
Pitch:2.54mm [YIMTEX 3362*05SANGR-09]
Table 28 CN6 USB 2.0 Port 10, 11 Pin Header
6
1
3
10
4
5
2
8
7
Pin
Signal Name
Pin
Signal Name
1
+USBVCC
2
+USBVCC
3
USB_A-
4
USB_B-
5
USB_A+
6
USB_B+
7
GND
8
GND
9
KEY
10
GND
Pitch:2.54mm [YIMTEX 3362*05SANGR-09]
