PAC2514x Users Guide Preview
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Rev. 1.3 12 December 2023 © 2023 Qorvo US, Inc.
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6.4
Register Summary
Table 6-1 CPM Register Summary
ADDRESS
REGISTER
DESCRIPTION
RESET
00h
SOC.FAULT
Fault condition indication register
00h
01h
SOC.STATUS
Hardware status condition register
00h
02h
SOC.MISC
Miscellaneous features register
00h
03h
SOC.PWRCTL
Power Manager control register
00h
04h
SOC.FAULTENABLE
Power Manager fault mask register
00h
05h
SOC.WATCHDOG
SOC Watchdog configuration register
00h
2Bh
SOC.SYSCONF
Power Manager system configuration register
0Ch
6.5
Register Details
6.5.1 SOC.FAULT
Register 6-1 SOC.FAULT (Fault Condition, 00h)
BIT
NAME
ACCESS
RESET
DESCRIPTION
7
TMPWARN
R
0x0
Real-time temperature warning status. When the temperature is greater
than the warning threshold, this bit is set to 1b. When the temperature
less than the warning threshold, this bit is set to 0b.
0b: No temperature warning
1b: Temperature warning
6
TMPWARN_LATCH
R
0x0
Latched temperature warning status. If the temperature reaches the
warning threshold and the
SOC.FAULTENABLE.nTMPWARN
is not
masked, this bit is set and nIRQ1 is asserted.
Write 1b to clear when not masked.
0b: No temperature warning
1b: Temperature warning
5
TMPFLT
R
0x0
Temperature fault status. If the temperature reaches the fault threshold,
this bit is set to 1b. Write 1b to clear.
0b: No temperature fault
1b: Temperature fault
4
VPFLT
R
0x0
DC/DC fault when VP is below UVLO or over-voltage. Set on fault, and
cleared when written to 1b.
0b: No VP fault
1b: VP fault
3
VSYSFLT
R
0x0
VSYS fault when VSYS is below UVLO or over-voltage. Set on fault, and
cleared when written to 1b.
0b: No VSYS fault
1b: VSYS fault