Qorivva MPC5xxx/SPC5xx Debugger and NEXUS Trace
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Tracing
Processors of the MPC5XXX/SPC5XX series implement a variety of trace modules. Depending on the
module, the trace information is either stored on the processor or sent out through an external trace port.
This section lists all available trace modules, their configuration options and examples.
e200 PCFIFO On-chip Trace
The PCFIFO is a FIFO which stores the last eight branch target addresses. It is implemented in e200 cores
of the MPC55XX, MPC56XX and SPC56X processors, excluding e200z0 and e200z1 cores.
TRACE32 supports the PCFIFO for all processors and regardless of the used debug solution (JTAG and
NEXUS). Using the PCFIFO does not require a trace license. It is also possible to use PCFIFO and NEXUS
trace in parallel.
The PCFIFO has no configurable options. It is always enabled. None of the trace related command groups
(SYStem, NEXUS, TrOnchip, Onchip) has an effect on the PCFIFO operation.
Usage: This command opens a window that shows the program flow. The program flow is reconstructed
based on the PCFIFO data.
Statistic analysis, RTOS tracing and run-time measurements are not possible with the PCFIFO.
MPC57XX/SPC57X/SPC58X NEXUS On-chip Trace (trace-to-memory)
Many processors of the MPC57XX/SPC57X series implement a feature to store the nexus messages of
cores and peripheral trace clients into an on-chip trace memory, the so-called trace-to-memory feature.
Using the on-chip trace with a debug cable requires the on-chip trace license LA-7968X. The on-chip trace
license is not required if a NEXUS adapter (LA-7630 or LA-7610) is in use. The on-chip trace license is also
not required when the Aurora NEXUS preprocessor (LA-3911) is connected.
Onchip.List
