Qorivva MPC5xxx/SPC5xx Debugger and NEXUS Trace
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CPU specific tables in MMU.DUMP <table>
MMU.List
Compact display of MMU translation table
Lists the address translation of the CPU-specific MMU table.
•
If called without address or range parameters, the complete table will be displayed.
•
If called without a table specifier, this command shows the debugger-internal translation table.
See
.
•
If the command is called with either an address range or an explicit address, table entries will
only be displayed if their
logical
address matches with the given parameter.
TLB1
Displays the contents of TLB1.
TLB2
Displays the contents of TLB2 (MPU).
Format:
MMU.List
<table>
[
<range>
|
<address>
|
<range>
<root>
|
<address>
<root>
]
MMU.
<table>
.List
(deprecated)
<table>
:
PageTable
KernelPageTable
TaskPageTable
<task_magic>
|
<task_id>
|
<task_name>
|
<space_id>
:0x0
<root>
The
<root>
argument can be used to specify a page table base address
deviating from the default page table base address. This allows to display a
page table located anywhere in memory.
<range>
<address>
Limit the address range displayed to either an address range
or to addresses larger or equal to
<address>
.
For most table types, the arguments
<range>
or
<address>
can also be
used to select the translation table of a specific process if a
given.
PageTable
Lists the entries of an MMU translation table.
•
if
<range>
or
<address>
have a space ID: list the translation table
of the specified process
•
else, this command lists the table the CPU currently uses for MMU
translation.
