Prestigio T200C, Service Manual

Page: 71 / 122

Schematic Diagrams
Clock Generator (71-T20C0-003) B - 11
B. T2X0C Schematics
Clock Generator
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
DREFCLK [4]
PCLK_LAN [16]
SMB_ICHDATA [7,11]
+3VS [2,4,5,6,7,9,11,12,13,14,15,16,18,19,21,22,23,24,26]
PCLK_SIO [19]
CLKEN# [26]
PCLK_MINIPCI [15]
PCLK_PCM [17]
INT_APICCLK [11]
CLK_ICHPCI [11]
SMB_ICHCLK [7,11]
PCLK_H8 [21]
CLK_ITP_CPU# [2]
CLK_ITP_CPU [2]
CLK_MCH_BCLK [5]
CLK_MCH_BCLK# [5]
CLK_CPU_BCLK [2]
CLK_CPU_BCLK# [2]
LCLKCTLA [4]
SMB_ICHCLK [7,11]
SMB_ICHDATA [7,11]
LCLKCTLB [4,5]
DREFSSCLK [4]
CLK_ICH48 [12]
CLK_ICH14 [12]
SUSA# [12,22]
PCI_STP# [12]
PM_STPCPU# [12,26]
CLK_ICH66 [11]
CLK_MCH66 [4]
CLK_SIO14 [19]
Z1014
SMB_ICHCLK
VDD48
F0
IREF
VDD48
Z1002
Z1024
SMB_ICHDATA
Z1001
Z1022
Z1021
Z1035
Z1012
Z1028
Z1010
Z1015
Z1003
Z1034
Z1029
Z1007
Z1009
Z1013
F2
Z1011
Z1033
Z1023
Z1025
Z1027
Z1030
SS_CLK_IN
SSC_SCLK
SUSA#
SSC_SDATA
Z1036
SS_CLK_IN
Z1031
Z1032
Z1008
DREFSSCLK
DREFSSCLK
Z1016
Z1017
Z1018
Z1019
Z1020
VDDCPU
VDDCPU
Z1004
Z1005
Z1006
Z1037
Z1026
R229 *10K
R552 *1K
C670
10P
C685
10P
T121
C351
10U_0805
C683
10P
C684
10P
C681
10P
C657
10P
R219 10
R218 33
C346
4.7U_0805
C370
0.1U
C672
1000P
R522
49.9_1%
C367
10U_0805
C371
0.1U
R220 33
R545
475_1%
R554 33
R253 33
L35
HCB3216K-800T30
R535
1K
R532
1K
C687
10P
+
C348
47U/6.3V_D
R548 2.7K
R258 33
R259 33
R257 33
C369
0.1U
R247 0 C669
10P
U29
*ICS91718
1
2
3
4
8
7
6
5
CLKIN
VDD
GND
CLKOUT
PD#
SCLK
SDATA
REF_OUT
R256 33
R546 *33 R246
*0
R248 *10K
C676
0.1U
R533 10K
R254 33
U28
ICS950810
4
9
15
20
27
31
36
41
47
46
53
1
8
14
19
32
26
28
23
24
49
56
10
11
12
13
16
17
18
54
55
5
29 39
38
25
33
35
21
22
34
42
45
48
51
44
40
50
52
7
30
2
6
43
3
37
GND
GND
GND
GND
GND
GND
GND
GND
GND
VDDCPU
CPU_STOP#
VDDREF
VDDPCI
VDDPCI
VDD3V66
VDD3V66
VDDA
VTT_PWRGD#
3V66_4/66MHz_OUT2
3V66_5/66MHz_IN
CPUCLKT1
REF
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
FS0
FS1
PCICLK_F0
SDATA 48MHz_USB
48MHz_DOT
PD#
3V66_0
VCH_CLK/3V66_1
3V66_2/66MHz_OUT0
3V66_3/66MHz_OUT1
PCI_STOP#
IREF
CPUCLKT2
CPUCLKC1
CPUCLKC0
CPUCLKC2
FS2
VDDCPU
CPUCLKT0
PCICLK_F2
SCLK
X1
PCICLK_F1
MULTSEL0/REF0
X2
VDD48
C355
10P
Y5 14.318MHz
1 2
R249 1M
R523
49.9_1%
R526
49.9_1%
R540 0
R541 *0
R543 0
R524
49.9_1%
C368
10P
R525
49.9_1%
L38 HCB2012K-121T30
R255 33
C675
0.1U
L33 HCB2012K-121T30
R527
49.9_1%
R542 *0
C662
1000P
C674
1000P
C661
0.1U
C688
1000P
R215 33
R216 33
R217 33
R213 33
R214 33
R212 33
C663
0.1U
T117
T120
T119
T116
T118
R211 33
C673
0.1U
C655
10P R521 *0
R260 33
C373
0.1U
C686
10P
C654
10P
R261
10K
C372
1U
C682
10P
C656
10P
R210 33
C664
0.1U
L32 HCB2012K-121T30
C347
10U_0805
R553 0
R547 *1K
R544 *1K
R534 0
R531 0
33.33
0
66.66
0
66MHz_IN
100
1
200
1
0
0
(MHz) (MHz)
0
0
66.66
Mid
66MHz_IN/2
Mid
IREF=2.32mA
Mid
66.66
1
66.66
33.33
133
33.33
66MHz_IN/2
133
1 66.66
66.66
66MHz_IN
66.66
0
1
0
66.66
66MHz_IN/2
66MHz OUT
1 Mid
0
66.66
66.66
(MHz)
1 66MHz_IN
0
1
1
1
66.66
CPU
1
3V66
0
0
FREQUENCY SETUP TABLE
1
66MHz_IN/2
1
0
0
66MHz_IN
66.66
0
1
66.66
100
0
1
PCI
200
33.33
66.66
(MHz)
(FS1) (FS0)
1
(FS2)
CLOSE TO ICS950810/TSSOP
PLACE CRYSTAL
WITHIN 500 MILS OF
CK408
AS SHORT AS POSSIBLE
Sheet 10 of 31
Clock Generator