Prestigio T200C, Service Manual

Page: 63 / 122

Schematic Diagrams
Pentium-M-1 (71-T20C0-003) B - 3
B. T2X0C Schematics
Pentium-M-1
+3VS
+3VS
+3VS
+3VS
+3VH8
+3VS
+VCCP
+VCCP
+VCCP
+VCCP
+3V
+VCCP
+3VH8
THERMAL_SCLK1 [21]
PM_THRM# [12]
THERMAL_SDA1 [21]
H_REQ#[4:0] [5]
H_A#[31:3] [5]
H_A#[31:3] [5]
H_ADSTB#0 [5]
H_ADSTB#1 [5]
H_A20M# [11]
H_FERR# [11]
H_IGNNE# [11]
H_STPCLK# [11]
H_INTR
[11]
H_NMI [11]
H_SMI# [11]
H_INIT# [11]
H_ADS# [5]
H_BNR# [5]
H_BPRI# [5]
H_DEFER# [5]
H_DRDY# [5]
H_DBSY# [5]
H_BR0# [5]
H_LOCK# [5]
H_TRDY# [5]
H_RS#1 [5]
H_RS#2 [5]
H_CPURST# [5]
H_HIT# [5]
H_HITM# [5]
CLK_CPU_BCLK [10]
CLK_CPU_BCLK# [10]
CLK_ITP_CPU# [10]
CLK_ITP_CPU [10]
H_RS#0 [5]
H_D#[0:63] [5]
H_D#[0:63] [5]
H_D#[0:63] [5]
H_D#[0:63] [5]
H_DSTBP#0 [5]
H_DSTBP#1 [5]
H_DSTBN#0 [5]
H_DSTBN#1 [5]
H_DSTBP#2 [5]
H_DSTBP#3 [5]
H_DSTBN#2 [5]
H_DSTBN#3 [5]
H_DINV#2 [5]
H_DINV#3 [5]
H_DINV#0 [5]
H_DINV#1 [5]
PM_PSI# [26]
H_CPUSLP# [11]
H_DPSLP# [4,11]
H_DPWR# [4]
H_PWRGD [11]
THRMTRIP# [21]
Z0214
Z0215
THERMAL_SDA1
Z0219 Z0216
Z0217
THERMAL_SCLK1
Z0220
Z0221
Z0222
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_FERR#
H_IERR#
H_CPURST#
H_THERMDA
H_THERMDC
PROCHOT#
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_ITP_CPU
CLK_ITP_CPU#
H_BPM0_ITP#
H_BPM2_ITP#
H_BPM3_ITP#
H_BPM4_PRDY#
H_BPM5_PREQ#
H_TCK
H_TDI
H_TDO
H_TMS
H_TRST#
ITP_DBRESET#
H_BPM1_ITP#
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#5
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
Z0204
Z0211
Z0210
Z0201
Z0202
Z0203
COMP0
COMP1
COMP2
COMP3
Z0223
CLK_CPU_BCLK
Z0225
CLK_CPU_BCLK#
Z0224
Z0226
CLK_ITP_CPU#
CLK_ITP_CPU
Z0205
Z0206
Z0209
Z0207
Z0208
H_TRST#
COMP1
COMP0
COMP3
COMP2
H_TCK
H_CPURST#
H_TDI
H_TDO
H_TMS
PM_THRMTRIP#
H_FERR#
ITP_DBRESET#
PM_THRMTRIP#
Z0212
Z0213
H_THERMDC
H_THERMDA
Z0218
PM_THRMTRIP#
R79 56
R406 330
R378
330
R376
1.3K_1%
R174
54.9_1%
R173
27.4_1%
R443
54.9_1%
Q53
2N3904
B
E
C
R445
27.4_1%
Q56
2N3904
B
E
C
T297
T296
T295
T298
T300
T299
ADDR GROUP0
ADDR GROUP1
CLK
THERM
ITP
CONTROL
U40A
Pentium-M
R2
P3
T2
P1
T1
P4
U4
V3
R3
V2
W1
T4
W2
Y4
Y1
U1
AA3
Y3
AA2
U3
AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1
AE5
C2
D3
A3
C6
D1
D4
B4
N2
L1
J3
L4
H2
M2
N4
A4
B5
J2
B11
H1
K1
L2
M3
K3
K4
C8
B8
A9
C9
A10
B10
A13
C12
A12
C11
B13
A7 B17
B18
A18
C17
B15
B14
A16
A15
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
ADSTB#0
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
ADSTB#1
A20M#
FERR#
IGNNE#
STPCLK#
LINT0
LINT1
SMI#
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
RESET#
RS0#
RS1#
RS2#
TRDY#
HIT#
HITM#
BPM#0
BPM#1
BPM#2
BPM#3
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR# PROCHOT#
THERMDA
THERMDC
THERMTRIP#
BCLK0
BCLK1
ITPCLK0
ITPCLK1
R78
330
R404 680
DATA GRP 0
DATA GRP 1
DATA GRP 2
DATA GRP 3
MISC
U40B
Pentium-M
A19
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26
C23
C22
K24
L24
W25
W24
AE24
AE25
D25
J26
T24
AD20
AD26
E26
G1
AC1
B2
P25
P26
AB2
AB1
C14
C3
AF7
C16
E1
B7
C19
E4
A6
C5
F23
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN0#
DSTBP0#
DSTBN1#
DSTBP1#
DSTBN2#
DSTBP2#
DSTBN3#
DSTBP3#
DINV0#
DINV1#
DINV2#
DINV3#
GTLREF0
GTLREF1/RSVD
GTLREF2/RSVD
GTLREF3/RSVD
NC1
COMP0
COMP1
COMP2
COMP3
RSVD1
RSVD2
RSVD3
RSVD4
PSI#
DPSLP#
DPWR#
PWRGOOD
SLP#
TEST1
TEST2
R81 54.9_1%
T275
T274
T273
T279
T278
T277
T276
C517
*10P
R418
*10
R402 150
R80 39
R393 *54.9_1%
R394 27
R440
*1K
R395
*1K
C516
*10P
R67 150
R417
*10
C519
*10P
R420
*10
R65
*1K
R419
*10
C518
*10P
T282
T280
T281
R152
2K_1%
R159
1K_1%
C206
0.1U_X7R
C203
0.01U
C209
1U_X7R
R421 56
R66 56
R403 680
R422
R388
10K
U38
NE1617DS
1
5
15
9
13
2
16
12 3
14
4
11
10
6
7
8
N/C1
N/C2
STBY#
N/C3
N/C4
VCC
N/C5
SMBDATA DXP
SMBCLK
DXN
ALERT#
ADD0
ADD1
GND1
GND2
R426 1K
R423 *0
R392 1K
R389
2.2K
C529
2200P
C524
0.1U_X7R
R390
2.2K
R391
10K
R415
*4.7K
R424
*4.7K
R425 *10K
R416 *0
+3VS [4,5,6,7,9,10,11,12,13,14,15,16,18,19,21,22,23,24,26]
+3VH8 [21,22,24,26,28]
+VCCP [3,5,6,12,13,26]
+3V [11,12,13,15,16,17,18,21,24,27]
Close to each clock signal
Layout Note:
COMP0, COMP2:0.5" Max, Zo=27.4Ohm
COMP1, COMP3: 0.5"Max, Zo=55Ohm
Best estimate is 18mil wide trace for outer layers and 14mil
if on internal layer.
0.5" max, Zo= 55 Ohm
Layout Note:
Route H_THERMDA and
H_THERMDC on same layer.
10 mil trace on 10 mil spacing.
Layout notice:
H_DPSLP# shoule not T-split
Sheet 2 of 31
Pentium-M-1