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Hardware Configuration 

PEB-2739I User’s Manual  

2-14 

 

 

 

CN11 : LVDS Panel Back Light Inverter Power Connector 

Pin No. 

Signal Description 

1 +5V 
2 GND 
3 +12V 
4 GND 
5 BACKLIGH_ENABLE 

 

 

 

CN12 : Power Connector 

Pin No. 

Signal Description 

1 +5V 
2 +5V 
3 +5V 

Standby 

4 +12V 
5 PS_ON# 
6 GND 
7 GND 
8 GND 

 

 

 

CN13 : LPC Debug Port Header 

Pin No. 

Signal Description 

Pin No. 

Signal Description 

1 LAD0 

2 +3.3V 

3 LAD1 

4 PLT_RST# 

5 LAD2 

6 LFRAME# 

7 LAD3 

8 LPC_PCID 

9 N/C 

10 GND 

 

 

 

CN14 : Giga Ethernet RJ45 with 2 port USB Jack 

Pin No. 

Signal Description 

Pin No. 

Signal Description 

1 

LAN 0+ 

2 

LAN 0- 

3 

LAN 1+ 

4 

LAN 2+ 

5 

LAN 2- 

6 

LAN 1- 

7 

LAN 3+ 

8 

LAN 3- 

9 +5V 

10 +5V 

11 USBD1- 

12 USBD3- 

13 USBD1+ 

14 USBD3+ 

15 GND 

16 GND 

 

 

 

Summary of Contents for PEB-2739I

Page 1: ...PEB 2739I Series Embedded System Board User s Manual Version 1 1a Copyright Portwell Inc 2011 All rights reserved All other brand names are registered trademarks of their respective owners ...

Page 2: ...ure 3 2 3 3 1 Mechanical Drawing 3 2 3 3 2 Intel Integrated Graphics GMCH Chip 3 2 3 3 3 Intel Gigabit Ethernet Controller 3 2 3 3 4 Audio Controller 3 3 3 4 Clear CMOS Operation 3 3 3 5 WDT Function 3 3 3 6 GPIO 3 4 3 7 WDT GPIO Assembly Code 3 4 Chapter 4 BIOS Setup Information 4 1 4 1 Entering Setup Launch System Setup 4 1 4 2 Main 4 2 4 3 Advanced 4 3 4 4 PCIPnP 4 15 4 5 Boot 4 17 4 6 Security...

Page 3: ...Timer function Chapter 4 BIOS Setup Information Specifies the meaning of each setup parameters how to get advanced BIOS performance and update new BIOS In addition POST checkpoint list will give users some guidelines of trouble shooting Chapter 5 Troubleshooting Provides various useful tips to quickly get PEB 2739I running with success As basic hardware installation has been addressed in Chapter 3...

Page 4: ...LVDS by request Based on the Intel Atom processor Z500PT series platform the PEB 2739I takes advantage of the processor s very low power consumption Ground breaking power management techniques and wide temperature so it can be a truly industrial temperature and fanless configuration In addition the PEB 2739I supports DC 12V input one SO DIMM memory slot for DDR2 SDRAM up to 2GB and comes with one ...

Page 5: ...to 2GB dual channel 400 533MHz memory z Serial Port Support one RS 232 and one RS 232 422 485 selectable z USB Interface Support six USB Universal Serial Bus ports four on rear I O and two on board header for internal devices USB port6 7 can support USB 2 0 only base on Intel specification z Client USB Support one Client USB on board edge z Audio Interface Connector for Mic In and Line Out z Keybo...

Page 6: ...th SDVO USB PCI E x1 signal One SDIO port 2x8 pin 2mm pitch box header One RS 232 port 2x5 pin 2mm pitch box header Two USB 2 0 ports 2x5 pin 2mm pitch header One Client USB connector One 3 pin power connector for system fan One power output port Power on off LED Hard drive activity LED and system Reset switch headers On board programmable 8 bit Digital I O interface z System Monitoring Feature Mo...

Page 7: ...nection Ver 10 6 15 0 Audio Card Onboard Realtek ALC662 Audio Chipset Audio Driver Realtek High Definition Audio Ver 6 0 1 5680 Chip Driver Intel Chipset Device Software Ver 8 8 0 1011 USB 2 0 Driver Intel SCH Family USB2 Enhanced Host Controller Ver 8 8 0 1001 IDE HDD WD WD1200BEVE 120GB 2 5 Compact Flash Transcend Ultra DMA 1GB TS1GCF45IF A5 USB CDROM ASUS CB 52164 DVD ROM Power Supply Seasonic ...

Page 8: ...System Overview PEB 2739I User s Manual 1 5 1 3 1 Mechanical Drawing ...

Page 9: ...System Overview PEB 2739I User s Manual 1 6 ...

Page 10: ...System Overview PEB 2739I User s Manual 1 7 1 4 System Architecture All of details operating relations are shown in PEB 2739I System Block Diagram PEB 2739I Block Diagram ...

Page 11: ...EB 2739I are in the proper position The default settings are indicated with a star sign Ì 2 1 Jumper Setting For users to customize PEB 2739I s features In the following sections Short means covering a jumper cap over jumper pins Open or N C Not Connected means removing a jumper cap from jumper pins Users can refer to Figure 2 1 for the Jumper and Connector locations PEB 2739I Jumper and Connector...

Page 12: ...Hardware Configuration PEB 2739I User s Manual 2 2 PEB 2739I Jumper and Connector Locations Bottom ...

Page 13: ...ormal operation 1 2 Open Programming microcontroller Note The mark for default setting J J JP P P4 4 4 5V 3 3V backlight enable pin power level selection Pin Signal Description 1 2 Short 3 3V 2 3 Short 5V Note The mark for default setting J J JP P P7 7 7 Clear CMOS JP7 Function 1 2 Short Normal operation 1 2 Open Clear CMOS Note The mark for default setting J J JP P P8 8 8 5V 3 3V Panel power sele...

Page 14: ...Audio Connector Side output Surround line output option J15 Audio Connector Line input Front output option J16 Big 4 power output J17 Panel backlight inverter s power connector J18 RJ45 Ethernet Port J19 USB port 3 4 J20 USB port 0 1 J21 Power adapter input Jack J22 Audio Jack Microphone input J23 Audio Jack Stereo line output J24 Serial port 1 J25 DDR2 SO DIMM 200Pin Socket J26 Compact flash Sock...

Page 15: ...SDIO_DATA3 8 3 3V 9 SDIO_DATA4 10 GND 11 SDIO_DATA5 12 SDIO_CD 13 SDIO_DATA6 14 SDIO_WP 15 SDIO_DATA7 16 GND J J J5 5 5 Microcontroller programmer Header Pin Assignment 1 V pp 2 3 3V 3 GND 4 I2C_DATA 5 I2C_CLK 6 N C J J J6 6 6 Serial port 2 Header Pin Assignment Pin Assignment 1 DCD 2 2 DSR 2 3 RXD 2 4 RTS 2 5 TXD 2 6 CTS 2 7 DTR 2 8 RI 2 9 GND 10 N C J J J7 7 7 USB Port5 Port6 Header Pin Assignme...

Page 16: ...P33 8 GP37 9 GND 10 5V J J J1 1 10 0 0 SDVO daughter board connector J J J1 1 11 1 1 Fan Connector Pin Assignment 1 GND 2 12V 3 RPM J J J1 1 12 2 2 LVDS Panel Interface Connector Pin Assignment Pin Assignment 1 VDD_LVDS 2 VDD_LVDS 3 LVDSA_DATA0 4 LVDSA_DATA0 5 LVDSA_DATA1 6 LVDSA_DATA1 7 LVDSA_DATA2 8 LVDSA_DATA2 9 LVDSA_DATA3 10 LVDSA_DATA3 11 LVDSA_CLK 12 LVDSA_CLK 13 L_DDC_CLK 14 L_DDC_DATA 15 ...

Page 17: ...ent Pin Assignment 1 NC 2 GND 3 SIDE_OUT_R 4 SIDESURR_JD 5 SIDE_OUT_L 6 GND 7 SUBWOF_OUT 8 CEN_JD 9 CENTER_OUT 10 NC J J J1 1 15 5 5 Audio Connector Line input Front output Option Pin Assignment Pin Assignment 1 NC 2 GND 3 LINE_IN_R 4 LINE_IN_JD 5 LINE_IN_L 6 GND 7 REAR_OUT_R 8 SURR_JD 9 REAR_OUT_L 10 NC J16 Big 4 Power Output Pin Assignment 1 12V 2 GND 3 GND 4 VCC J17 LVDS Panel Back Light Invert...

Page 18: ...B2 USBD4 A3 USBD3 B3 USBD4 A4 GND B4 GND CG1 GND CG3 GND CG2 GND CG4 GND J J J2 2 20 0 0 USB Port0 Port1 Connector Pin Assignment Pin Assignment A1 5V B1 5V A2 USBD0 B2 USBD1 A3 USBD0 B3 USBD1 A4 GND B4 GND CG1 GND CG3 GND CG2 GND CG4 GND J J J2 2 21 1 1 Power Adapter Input Jack J J J2 2 22 2 2 Audio Jack Microphone input J J J2 2 23 3 3 Audio Jack Stereo line output J J J2 2 24 4 4 Serial port 1 ...

Page 19: ...d 33 N C 9 Ground 34 IOR 10 Ground 35 IOW 11 Ground 36 Write Enable 12 Ground 37 IRQ 13 5V 38 5V 14 Ground 39 CSEL 15 Ground 40 N C 16 Ground 41 RESET 17 Ground 42 IORDY 18 HDC SDA2 43 DREQ 19 HDC SDA1 44 DACK 20 HDC SDA0 45 HDC ACT 21 Data 0 46 PDIAG 22 Data 1 47 Data 8 23 Data 2 48 Data 9 24 N C 49 Data 10 25 N C 50 Ground J27 Battery Socket Option J28 SATA POWER PIN No Signal Description 1 Grou...

Page 20: ...ction Remark CN1 SATA port 1 CN2 SDIO Port Support SD 1 1 and MMC 4 0 only CN3 PATA 44 Pin IDE CN4 Temperature Sense CN5 SATA port 2 CN6 Serial port 2 CN7 USB port 6 7 CN8 USB port 0 2 CN9 8 bit GPIO CN10 Single channel LVDS panel interface CN11 Panel backlight inverter s power CN12 ATX power source CN13 LPC Debug Port CN14 Giga Ethernet with USB port 1 3 CN15 Microcontroller programmer CN16 PS 2 ...

Page 21: ...Pin No Signal Description 1 SDIO_DATA0 2 3 3V 3 SDIO_DATA1 4 SDIO_CLK 5 SDIO_DATA2 6 SDIO_CMD 7 SDIO_DATA3 8 3 3V 9 SDIO_DATA4 10 GND 11 SDIO_DATA5 12 SDIO_CD 13 SDIO_DATA6 14 SDIO_WP 15 SDIO_DATA7 16 GND CN3 Hard Disk 44 pin Connector Pin No Signal Description Pin No Signal Description 1 R_PLT_RST 2 GND 3 PDD7 4 PDD8 5 PDD6 6 PDD9 7 PDD5 8 PDD10 9 PDD4 10 PDD11 11 PDD3 12 PDD12 13 PDD2 14 PDD13 1...

Page 22: ...40 GND 41 5V 42 5V 43 GND 44 N C CN4 Temperature Sense Pin No Signal Description 1 Thermal resister 10K 2 Analog ground CN5 SATA Port 2 Pin No Signal Description 1 GND 2 SATATX 3 SATATX 4 GND 5 SATARX 6 SATARX 7 GND CN6 Serial port 2 Connector Pin No Signal Description Pin No Signal Description 1 DCD1 2 RXD1 3 TXD1 4 DTR1 5 GND 6 DSR1 7 RTS1 8 CTS1 9 RI1 10 N C ...

Page 23: ... No Signal Description Pin No Signal Description 1 LPC_GP10 2 LPC_GP14 3 LPC_GP11 4 LPC_GP15 5 LPC_GP12 6 LPC_GP16 7 LPC_GP13 8 LPC_GP17 9 GND 10 5V CN10 LVDS Panel Interface Connector Pin No Signal Description Pin No Signal Description 1 LVDSA_DATA0 2 LVDSA_DATA0 3 LVDSA_DATA1 4 LVDSA_DATA1 5 LVDSA_DATA2 6 LVDSA_DATA2 7 LVDSA_DATA3 8 LVDSA_DATA3 9 LVDSA_CLK 10 LVDSA_CLK 11 N C 12 N C 13 N C 14 N ...

Page 24: ...5V 3 5V Standby 4 12V 5 PS_ON 6 GND 7 GND 8 GND CN13 LPC Debug Port Header Pin No Signal Description Pin No Signal Description 1 LAD0 2 3 3V 3 LAD1 4 PLT_RST 5 LAD2 6 LFRAME 7 LAD3 8 LPC_PCID 9 N C 10 GND CN14 Giga Ethernet RJ45 with 2 port USB Jack Pin No Signal Description Pin No Signal Description 1 LAN 0 2 LAN 0 3 LAN 1 4 LAN 2 5 LAN 2 6 LAN 1 7 LAN 3 8 LAN 3 9 5V 10 5V 11 USBD1 12 USBD3 13 US...

Page 25: ...d Mouse Pin No Signal Description Pin No Signal Description B1 KB_DATA T1 MS_DATA B2 N C T2 N C B3 GND T3 GND B4 5V T4 5V B5 KB_CLK T5 MS_CLK B6 N C T6 N C CN17 USB Port4 Port5 Jack Pin No Signal Description Pin No Signal Description T1 5V B1 5V T2 USBD5 B2 USBD4 T3 USBD5 B3 USBD4 T4 GND B4 GND CN18 Audio Jack Pin No Signal Description Top Stereo line out Bottom Microphone input ...

Page 26: ... DSR2 T7 RTS2 T8 CTS2 T9 RI2 CN20 Front Panel Header Pin No Signal Description Pin No Signal Description 1 SUS_LED 2 5V_Dual 3 HDD_LED 4 3 3V 5 GND 6 RESET 7 PWR_ON_SW 8 GND CN21 Fan Connector Pin No Signal Description 1 GND 2 12V 3 RPM CN22 DDR2 SO DIMM 200Pin Connector CN23 Compact Flash connector Pin No Signal Description Pin No Signal Description 1 Ground 26 N C 2 Data 3 27 Data 11 3 Data 4 28...

Page 27: ...4 7k to 5V 12 Ground 37 IRQ 13 5V 38 5V 14 Ground 39 CSEL pull low 470 to Gnd 15 Ground 40 N C 16 Ground 41 RESET 17 Ground 42 IORDY 18 HDC SDA2 43 DREQ 19 HDC SDA1 44 DACK 20 HDC SDA0 45 HDC ACT 21 Data 0 46 PDIAG Pull Low 150 ohms 22 Data 1 47 Data 8 23 Data 2 48 Data 9 24 N C 49 Data 10 25 N C 50 Ground ...

Page 28: ...SODIMM as main memory Non ECC Error Checking and Correcting non register functions The maximum memory can be up to 2GB Memory clock and related settings can be detected by BIOS via SPD interface For system compatibility and stability do not use memory module without brand Memory configuration can be set to either one double sided DIMM in one DIMM socket Beware of the connection and lock integrity ...

Page 29: ...h as Windows XP Vista Win7 please install its INF before any of other Drivers are installed You can find very easily this chipset component driver in PEB 2739I CD title 3 3 2 Intel Integrated Graphics GMCH Chip PEB 2739I uses Intel GMA500 integrated graphic chipset to gain an outstanding graphic performance Shared 8 accompany it to 128MB system DDR2 SODIMM with Total Graphics Memory PEB 2739I supp...

Page 30: ...ing command with a Twd can be issued to re count WDT and continue the status monitoring If the system encounters a software or application hang WDT will generate a system reset after its timeout The related Control Registers of WDT are included in the following programming guide that is written in C language User can write a non zero value defined as Twd into the Time out Value Register CR_Twd to ...

Page 31: ...J9 shown as follows Notes Do not short circuit Pin 9 and 10 of J9 3 7 WDT GPIO Assembly Code include stdio h include stdlib h include conio h void WDT_Enable int time int mode void WDT_Disable void GPIO_Set_Mode int bit int mode void GPIO_Write int bit int data int GPIO_Read int bit void main outp 0x2e 0x87 Input SIO entry key outp 0x2e 0x87 WDT sample code WDT_Enable 20 0 WDT_Disable GPIO sampe c...

Page 32: ...isable outp 0x2e 0x2d outp 0x2f inp 0x2f 0x01 Disable WDT function bit 0 7 GPIO 30 37 mode 0 output 1 input void GPIO_Set_Mode int bit int mode int tmp 1 bit outp 0x2e 0x07 outp 0x2f 0x09 entry device 9 outp 0x2e 0xf0 outp 0x2f inp 0x2f tmp tmp mode 0 for output 1 for intput data 0 for low 1 for high void GPIO_Write int bit int data int tmp 1 bit outp 0x2e 0x07 outp 0x2f 0x09 entry device 9 outp 0...

Page 33: ...System Installation PEB 2739I User s Manual 3 6 outp 0x2f 0x09 entry device 9 outp 0x2e 0xf1 data inp 0x2f tmp read bit if data 0 return 0 else return 1 ...

Page 34: ...e user to enter the SETUP program Some errors are significant enough to abort the start up 4 1 Entering Setup Launch System Setup Power on the computer and the system will start POST Power On Self Test process When the message below appears on the screen press Del key to enter Setup Press Del to enter SETUP If the message disappears before you respond and you still wish to enter Setup restart the ...

Page 35: ...ns such as time date etc AMI BIOS Processor System Memory These items show the firmware and hardware specifications of your system Read only System Time The time format is Hour Minute Second Use or to configure system Time System Date The date format is Day Month Date Year Use or to configure system Date ...

Page 36: ...BIOS Setup Information PEB 2739I User s Manual 4 3 4 3 Advanced Use this menu to set up the items of special enhanced features ...

Page 37: ...f your CPU Read only Hardware Prefetcher The choice Disabled Enabled Adjacent Cache Line Prefetch The choice Disabled Enabled Max CPUID Value Limit Disabled for Windows XP The choice Disabled Enabled Execute Disable Bit capability When disabled force the XD feature flag to always return 0 The choice Disabled Enabled ...

Page 38: ...er OS OS not optimized for Hyper Threading Technology The choice Enabled Disabled Intel R Speed Step tm Tech Disable Disable GV3 Enable Enable GV3 IDE Configuration The IDE Configuration the IDE devices such as hard disk drive or CD ROM drive It uses a separate sub menu to configure each hard disk drive Master and Slave ATA IDE Configuration The choice Disabled Compatible Enabled ...

Page 39: ...Sectors Block Multi Sector Transfer Any selection except Disabled determines the number of sectors transferred per block PIO Mode Indicates the type of PIO Programmed Input Output DMA Mode Indicates the type of Ultra DMA S M A R T This allows you to activate the S M A R T Self Monitoring Analysis Reporting Technology capability for the hard disks S M A R T is a utility that monitors your disk stat...

Page 40: ...bled Enabled IDE Detect Time Out Sec Select the time out value for detecting ATA ATAPI device s The choice 0 5 10 15 20 25 30 35 ATA PI 80Pin Cable Detection Select the mechanism for detecting 80Pin ATA PI cable The choice Host Device Host Device Super IO Configuration Serial Port 1 Address IRQ Allows BIOS Select Serial Port1 Base Addresses The choice Address Disabled 3F8 3E8 2E8 IRQ 3 4 10 11 ...

Page 41: ...The choice Address Disabled 2F8 3E8 2E8 IRQ 3 4 10 11 Serial Port 2 Mode The choice Normal IrDA ASK IR Watch Dog Timer Set This BIOS testing option is able to reset the system according to the selected table The Choice Disabled 10 20 30 40 sec 1 2 4 min Hardware Health Configuration Configuration monitor the Hardware Health ...

Page 42: ...BIOS Setup Information PEB 2739I User s Manual 4 9 ACPI Settings Select for Advanced ACPI Configuration General ACPI Configuration ...

Page 43: ...aintains all system contexts S3 STR The S3 sleep mode is a lower power state where the information of system configuration and open applications files is saved to main memory that remains powered while most other hardware components turn off to save energy The information stored in memory will be used to restore the system when a wake up event occurs Advanced ACPI Configuration Advanced ACPI Confi...

Page 44: ...bled Enabled AMI OEMB table Include OEMB table pointer to R X SDT pointer list The choice Disabled Enabled Headless mode Enable Disable Headless operation mode through ACPI The choice Disabled Enabled South Bridge ACPI Configuration The South Bridge ACPI related Configuration settings Use this section to configure additional ACPI options ...

Page 45: ...from S3 S4 mode The choice Disabled Enabled MPS Configuration Configure the Multi Processor Table MPS Revision This field allows you to select which MPS Multi Processor Specification version to be used for the operating system You need to select the MPS version supported by your operating system To find out which version to use consult the vendor of your operating system The choice 1 1 1 4 ...

Page 46: ...BIOS Setup Information PEB 2739I User s Manual 4 13 Smbios Configuration SMBIOS Configuration Menu Smbios Smi Support SMBIOS SMI Wrapper support for PnP Function 50h 54h The choice Disabled Enabled ...

Page 47: ...rt or have any USB 1 1 2 0 driver installed such as DOS and SCO Unix The choice Disabled Enabled Auto USB 2 0 Controller Mode This setting specifies the operation mode of the onboard USB 2 0 controller The choice FullSpeed HiSpeed BIOS EHCI Hand Off This is a workaround for OSes without EHCI hand off support The EHCI ownership change should claim by EHCI driver The choice Disabled Enabled ...

Page 48: ...tem Boot The choice No Yes Plug Play O S No lets the BIOS configure all the devices in the system Yes lets the operating system configure Plug and Play PnP devices not required for boot if your system has a Plug and Play operating system The choice No Yes PCI Latency Timer Select value in units of PCI clocks for PCI device latency timer register The choice 32 64 96 128 160 192 224 248 ...

Page 49: ...ering for reading writing to IDE drives The choice Disabled Enabled OffBoard PCI ISA IDE Card Some PCI IDE cards may require this to be set to the PCI slot number that is holding the card AUTO Works for most PCI IDE cards The choice Auto PCI Slot1 PCI Slot2 PCI Slot3 PCI Slot4 PCI Slot5 PCI Slot6 IRQ 3 IRQ 4 IRQ5 IRQ7 IRQ 9 IRQ 10 IRQ 11 IRQ 14 IRQ 15 Available Specified IRQ is available to be use...

Page 50: ...BIOS Setup Information PEB 2739I User s Manual 4 17 4 5 Boot Use this menu to specify the priority of boot devices Boot Settings Configuration ...

Page 51: ...sequence This delay ensures that the logo is displayed for a sufficient amount of time Therefore it is recommended that you disable this BIOS feature for a faster boot up time The choice Disabled Enabled AddOn ROM Display Mode This item is used to determine the display mode when an optional ROM is initialized during POST When set to Force BIOS the display mode used by AMI BIOS is used Select Keep ...

Page 52: ...he BIOS Setup Utility The choice Disabled Enabled Interrupt 19 Capture Interrupt 19 is the software interrupt that handles the boot disk function When enabled this BIOS feature allows the ROM BIOS of these host adaptors to capture Interrupt 19 during the boot process so that drives attached to these adaptors can function as bootable disks In addition it allows you to gain access to the host adapto...

Page 53: ... set the sequence of boot devices where BIOS attempts to load the disk operating system First press Enter to enter the sub menu Then you may use the arrow keys to select the desired device then press or PageUp PageDown key to move it up down in the priority list The choice Network IBA GE Slot 00C8 v1324 Disabled ...

Page 54: ... Drives 1st Drive This setting allows users to set the priority of the removable devices First press Enter to enter the sub menu Then you may use the arrow keys to select the desired device then press or PageUp PageDown key to move it up down in the priority list ...

Page 55: ...d Supervisor Password controls access to the BIOS Setup utility These settings allow you to set or change the supervisor password User Password Change User Password User Password controls access to the system at boot These settings allow you to set or change the user password Boot Sector Virus Protection Boot Sector Virus Protection The choice Disabled Enabled ...

Page 56: ...BIOS Setup Information PEB 2739I User s Manual 4 23 4 7 Chipset This menu controls the advanced features of the onboard Northbridge and Southbridge Onboard LAN PXE ROM Init The choice Disabled Enabled ...

Page 57: ...guration Primary Graphic Adapter Select which graphics controller to use as the primary boot device The choice IGD PCIe IGD Internal Graphics Mode Select Select the amount of system memory used by the internal graphics device The choice Disable Enabled 1MB Enabled 4MB Enabled 8MB ...

Page 58: ...l CRT External LVDS Local Flat Panel Scaling The choice Auto Forced Scaling Disabled Flat Panel Type The choice 640x480 generic 800x600 generic 1024x768 generic 1200x1024 DPST Control The choice VBIOS Default DPST Disabled DPST Enabled at Level 1 DPST Enabled at Level 2 DPST Enabled at Level 3 DPST Enabled at Level 4 DPST Enabled at Level 5 ...

Page 59: ...r The choice Disabled 2 USB Ports 4 USB Ports 6 USB Ports USB 2 0 Controller Set to Enabled if you need to use any USB 2 0 device in the operating system that does not support or have any USB 2 0 driver installed such as DOS and SCO Unix The choice Enabled Disabled USB Client Controller The choice Enabled Disabled SDIOController The choice Enabled Disabled ...

Page 60: ...AC Power Loss This item allows user to configure the power status of using ATX power supply after a serious power loss occurs The choice Power Off Power On Last State Serial IRQ Mode The choice Continuous Quiet PICE Port 0 1 The choice Auto Enabled Disabled 4 8 Exit This menu allows you to load the BIOS default values or factory default settings into the BIOS and exit the BIOS setup utility with o...

Page 61: ...p Utility Discard Changes and Exit Abandon all changes and exit the Setup Utility Discard Changes Abandon all changes and continue with the Setup Utility Load Optimal Defaults Use this menu to load the default values set by the SBC manufacturer specifically for optimal performance of the SBC Load Failsafe Defaults Use this menu to load the default values set by the BIOS vendor for stable system pe...

Page 62: ...rectly adopted modules and connected all the device cables required before turning on ATX power 200 pin DDR2 SO DIMM keyboard mouse SATA hard disk CF connector VGA connector device power cables ATX accessories are good examples that deserve attention With no assurance of properly and correctly accommodating these modules and devices it is very possible to encounter system failures that result in m...

Page 63: ...ccess mode to Auto This will force system to automatically pick up the IDE devices that are being connected each time system boots up Improper disable operation There are too many occasions where users disable a certain device feature in one application through BIOS setting These variables may not be set back to the original values when needed These devices features will certainly fail to be detec...

Page 64: ...o can be identical of the device The following table lists the system memory address used for your reference Memory Area Size Description 0000 0XXX XXK XXX 0000 003F 1K Interrupt Area 0040 004F 0 3K BIOS Data Area 0050 006F 0 5K System Data 0070 0E2E 54K DOS 0E2F 0F6B 5K Program Area 0F6C 9FBF 577K Available First Meg Conventional memory end at 639K A000 AXXX XX K XXX 9FC0 9FFF 1K Extended BIOS Ar...

Page 65: ...ystem ROM System Timer IRQ 1 System ROM Keyboard Event IRQ 2 Unassigned Usable IRQ IRQ 3 System ROM COM2 IRQ 4 System ROM COM1 IRQ 5 Unassigned Usable IRQ IRQ 6 System ROM Diskette Event IRQ 7 Unused Usable IRQ IRQ 8 System ROM Real Time Clock IRQ 9 Unassigned Usable IRQ IRQ 10 Unassigned Usable IRQ IRQ 11 Unassigned Usable IRQ IRQ 12 System ROM IBM Mouse Event IRQ 13 System ROM Coprocessor Error ...

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