Pioneer PDP-5016, Service Manual

Page: 49 / 70

SiI 161B
PanelLink
®
Receiver
August 2002
Data Sheet
General Description Features
The
SiI 161
B receiver uses PanelLink Digital
technology to support high-resolution displays up to
UXGA (25-165MHz). This receiver supports up to true
color panels (24 bits per pixel, 16M colors) with both
one and two pixels per clock.
All PanelLink products are designed on a scaleable
CMOS architecture, ensuring support for future
performance enhancements while maintaining the
same logical interface. System designers can be
assured that the interface will be stable through a
number of technology and performance generations.
PanelLink Digital technology simplifies PC and display
interface design by resolving many of the system level
issues associated with high-speed mixed signal design,
providing the system designer with a digital interface
solution that is quicker to market and lower in cost.
• Low Power Operation: 280mA max. current
consumption at 3.3V core operation
•
Time staggered data output for reduced ground
bounce and lower EMI
•
Sync Detect feature for Plug & Display
•
Cable Distance Support: over 5m with twisted-
pair, fiber-optics ready
• ESD tolerant to 5kV (HBM on all pins)
• Compliant with DVI 1.0 (DVI is backwards
compatible with VESA
®
P&D
TM
, FPDI-2
TM
and
DFP)
•
HSYNC de-jitter circuitry enables stable operation
even when HSYNC contains jitter
•
Low power standby mode
• Automatic entry into standby mode with clock
detect circuitry
•
Standard and Pb-free packages (see page 25).