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PRO-730HDI
127
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8.2 IC INFORMATION
No.
Pin Name
Pin Function
I/O
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
VHOLD1
HLF1
SCL3
SDA3
(MAINH)
(INT)
(CEC1)
BYTE
CNVSS
ACLOFF
CMUTE
RESET
XOUT
VSS
XIN
I
I/O
O
I/O
TIM INPUT
I
I/O
I
I
O
O
I
O
-
I
External parts for main CCD standard voltage generating circuits are connected.
External parts for main CCD timing signal generating circuits are connected.
SCL signal for CXA1875 (HDMI for DAC)
SDA signal for CXA1875 (HDMI for DAC)
HSYNC input for main signal existence distinction
Change of a HDMI incoming signal form Existence is outputted. (not use)
CEC input and output (not use)
External data bus width change terminal
Serial input and output mode change signal input
ACL OFF signal output at the time of AUTO ACL.
Conver mute output
Reset input
Output terminal of system clock generating circuit
GND
Input terminal of system clock generating circuit
Pin Function (1/3)
M306V7FGFP (VIDEO UCOM SERVICE ASSY : IC1906)
System micro-computer IC
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
VCCI
OSC1
OSC2
REM
(CEC2)
OSDBLK
OSDHALF
HS1
WP
HS2
CBUSY
CRESET
SCL2
SCL1
SDA1
SDA2
OSDR
OSDG
OSDB
TXD0
RXD0
CLK0
RTS0
VMUTE
SHARPSW
EPM
31KSW
I
I
O
INT INPUT
I/O
O
O
TIM INPUT
O
TIM
I
O
O
O
I/O
I/O
O
O
O
O
I
I
I
O
O
I
O
STB 3.3V
Filter connection for internal clock generating circuits for OSD
Open
SR remote control signal input
CEC input and output (not use)
OSD BLK output
OSDHALFoutput
Level synchronous count input for tuner 1 reception
Signal for conver EEPROM rewriting
Level synchronous count input for tuner 2 reception
BUSY signal for CM0021 (digital conver) control
RESET signal for CM0021 (digital conver) control
CM0022AF (digital conver), TA1340F (main, sub synchronization), YGT-035 (Hitachi module),
M62399FP (DAC for videos), CXA2180AQ (video jungle), CXA2153 (gamma compensation) and SCL
signal for BD3867F (audio)
TUNER1.2,CXA2069Q(AVI/O),CXA2171Q (main,sub component SW)SCL signal for uPD64083(3D Y/C)
TUNER1.2,CXA2069Q(AVI/O),CXA2171Q (main,sub component SW)SDA signal for uPD64083(3D Y/C)
CM0022AF (digital conver), TA1340F (main, sub synchronization), YGT-035 (Hitachi module),
M62399FP (DAC for videos), CXA2180AQ (video jungle), CXA2153 (gamma compensation) and SDA
signal for BD3867F (audio)
OSD R output
OSD G output
OSD B output
RS-232C, serial input and output mode communication (for transmission)
RS-232C, serial input and output mode communication (for reception)
Serial clock at the time of writing and elimination
Writing, the BUSY signal at the time of elimination
Video mute output (parent screen and small screen mute)
SHARPNESS ON/OFF change signal (AN5395FBP)
Serial input-and-output mode setting port
Input signal 31K and other SHARPNESS , picture quality change signal (AN5395FBP)
• The information shown in the list is basic information and may not correspond exactly to that shown in the schematic diagrams.
•
List of IC
M306V7FGFP, SiI9993CTG100