DEH-P470MP/XM/UC
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6.4 SYSTEM MICROCOMPUTER TEST PROGRAM
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PCL Output
In the normal operation mode (with the detachable panel installed, the ACC switched ON, the standby mode cancelled),
shift the TESTIN (Pin 5) terminal to H. The clock signal is output from the PCL terminal (Pin 62). The frequency of the
clock signal is 786.432kHz that is one 16th of the fundamental frequency. The clock signal should be 786.432kHz ± 31.5Hz.
If the clock signal is out of the range, the X'tal (X601) should be replaced with new one.
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