Phytec phyCORE-MPC5200B tiny, Hardware Manual

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System Memory
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PHYTEC Messtechnik GmbH 2006 L-678e_0
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6 System Memory
The system memory consist of Flash memory, DDR SDRAM (Double
Data Rate Synchronous Dynamic Random Access Memory) and a
small non-volatile memory device:
•
16 MByte Intel Strata Flash memory (1x 16-bit, multiplexed mode)
•
64 MByte DDR SDRAM (2x 16-bit)
•
4 kByte serial memory (EEPROM)
The Flash memory is connected to the PowerPC LocalPlus bus and is
controlled by /CS0. This Chip-Select signal is used for boot operation.
The DDR SDRAM is connected to the special SDRAM interface of
the MPC5200B processor and operates at the maximum frequency
(132 MHz).
Communication to the small non-volatile memory device (EPROM) is
established over the processor's I
2
C bus. This memory device holds
the boot loader (U-Boot) environment variables in its first two
kilobytes and can be used for parameter storage.