Phoenix Contact ILC 330 Series, User Manual, Page: 26 / 96

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PHOENIX CONTACT 6959_en_07
2.10 Internal basic circuit diagram
Figure 2-12 Internal basic circuit diagram
Key:
Akku
RTC
SDRAM
FLASH
NVRAM
DPM
µP
ETH
FPGA
Reset
3,3 V
5 V
3,3 V
1,8 V
3,3 V
1,5 V
24 V
3,3 V
Reset
µP
SRAM
FLASH
IPMS
US
UL
UM
+24 V (U )
S
+24 V (U )
S
+24 V (U )
M
+24 V (U )
M
7 V
24 V
24 V
24 V
I1
I3
Q1
Q3
Q2
Q4
Local bus
U
L
U
L
I11
I12
U
ANA
U
ANA
6959C021
LED Non-volatile read/write memory
RJ45 socket Non-volatile RAM
Transmitter Dual-port memory
Reset button Mode selector switch
Reset block Connection for parameterization memory
Battery RS-232 interface
Realtime clock Static RAM
Microprocessor Bus master (IPMS)
Field-programmable gate array Clock generator for local bus clock
Ethernet Converter
Synchronous dynamic RAM
Optocoupler Digital output
Transistor Resistor
Digital input Protective circuit
FLASH
NVRAM
DPM
Reset
Reset
Batt.
RTC SRAM
µP
IPMS
FPGA
ETH
SDRAM
Other symbols used are explained in the IB IL SYS PRO UM E user manual.