Philips DVP 7400S, Service Manual, Page: 18 / 42

EN 18 3139 785 32310 6. Block Diagram, Wiring Diagram
Wiring Diagram
GND_V
SPDIF_OUT
18
9
4
STDBY_CTRL
09FE-BT-VK-N
I2C_CLK
GND_D
1KHZ ( not used )
D
_
D
N
G
9
20
3
6
8
I2C_CLK
D
N
G
12
D
N
G
_
V
A
K
L
C
_
C
2I
3
E
NI
L
D
H
_
C
24
2
)
d
e
s
u t
o
n
(
Al
o
V
3
PCM_Data_EX_sLR (op)
5
Audio Signal
6
26
3
5
I2C_CLK
21
14
27
3
V
3
+
+1V8
3
V
3
+
7
21
+5V_STB
5
1
19
16
GND
09FE-BT-VK-N
GND
PCM_Data_LR
7
4
7
GND_V
C
DAC_RST
7
14
15
1
2
3
4
5
SDA-DAC
PCM_Data_sLR
8
7
6
30
3
1
27
28
29
2
2
7
7
2
3
8
GND
C
N
NC / Line 2
GND
GND_V
GND_V
G_Y
GND_V
R_V
GND_V
Y
D
N
G
GND
STB_CTL
15
Interface connection
2
PCM_Data_EX_sLR (op)
DAC_RST
9
GND
8
2
10
V
4
2-
16
18
9
8
B0
7
GND
M
7
2
4
1
+5VL
GND
GND
+5VL
D
_
D
N
G
DAC_STDBY
5
15
1
10
4
3
4
+1V8
GND_V
P50
SCART1/Line3
SCART0/Line3
24
23
4
16
6
1
Y
9
GND
L
V
5
+
8
2
6
4
5
6
11
6
7
1
RC6_OUT
1
1
N
Y
S
V
D
N
G
T
E
D
_I
M
D
H
A
T
A
D
_
C
2I
8
1
4
5
GND
AK4382A
+5VL
R_V
Video Signal
4
3
D
N
G
D
N
G
8
2
1
Video Signal
Interface connections
1 0
1
5 6
9
8
1105
3
1 2
12
3
4
2
5
2
3
1
2
2
6
5
6
7
11
0
2 2
2
E
NI
L
D
VolB ( not used )
8 9
19
22
GND
6
D
N
G
B
T
S
_
V
5
+
V
4
2-
1 2
3
GND
STDBY_CTRL
8
30
GND_V
12
2 1
18
I2C_DATA
GND
2
4
4
5
6
6
3
GND
23
5
6
23
VINTRQ
11
2
D
N
G
7
A
T
A
D
V
D
N
G
3
2
11
C
N
14
17
15
16
18
1
2
5
6
26
D
N
G
C
N
H
_
S
B
V
C
9
1
D
N
G
_
V
A
SPDIF_OUT
8
GND
V
2
1
+
+3V3
GND
-12V
GND
3
3 4 5
D
N
G
V
2
1
+
0
3
7
2
20
7
8
3
A
T
A
D
V
GND
PCM_Data_sLR
PCM_Data_Sub/Cen
+8V
+8V
2
2
A
V
5
+
10
1
1
+12V
B0
I2C_DATA
1
12
9
+1V8
+1V8
9
8
1
9
25
24
PCM_DATA0
25
+3V3
30FMN-BTRK-A
9
D
N
G
_
V
A
2
5
1
17
-12V
+3V3
3
+3V3
GND
8
GND
19
GND
GND_V
PCM_LRCLK
SCL_DAC
D
_
D
N
G
3
V
3
+
V
2
1
+
D
_
D
N
G
0
A
T
A
D
V
PCM_Data_Sub/Cen
Dig Aud Sig
VolA ( not used )
6
K
L
C
_
C
2I
D
_
D
N
G
)
d
e
s
u t
o
n
(
Z
H
K
1
T
U
O
_
6
C
R
4
3
GND_V
6
PCM_LRCLK
GND_V
Q
R
T
NI
V
A
T
A
D
_
C
2I
8
H
_
C
D
N
G
_
V
A
H
_
Y
C
11
3
GND
5
1101
5
12
GND_V
+12V
4
10
11
1
14
SFV24R-1ST 1
1
24
2
13
1
SDA_DAC
B_U
P50
SCART1/Line3
N
T
E
D
D
P
D
N
T
E
D
D
P
D
1
-24V
4
PCM_Data_LR
22
GND_V
CVBS
B_U
AV_MUTE
SPDIF_PCM_Data_MIC_IN
9
16
CVBS
D
N
G
2
A
T
A
D
V
4
1
1
2
1
3
E
NI
L
D
4
A
T
A
D
V
0
1
13
10
D
N
G
+5VL
1301
3
12
20
1
E
NI
L
D
+8V
DAC
1
14
0
3
9
2
8
2
7
2
1
1
To control
13
6
2
4
1
GND
1
+5VL
2
1
3 4 5
D
N
G
1
2
4
L
R
T
C
_
Y
B
D
T
S
23
7
12
13
I2C_DATA
SCL-DAC
GND
29
5
DAC_STB
1
8
GND_V
G_Y
SCL_5V
STB_CTL
6
GND_V
STDBY_CTRL
GND
D
_
D
N
G
9
10
11
12
13
14
15
MIC_DET
D
N
G
_
V
A
H
_
Y
D
N
G
_
V
A
PCM_SCLK
PCM_DATA0
PCM_CLK
AV_MUTE
16
8
SPDIF_PCM_Data_MIC_IN
INT_REG
GND
GND_V
INT_REG
GND
STB_CTL
SCL_5V
7
6 7
A
V
5
+
D
N
G
_
V
A
H
_
S
B
V
C
+5VL
GND_V
GND_V
3
17
PCM_SCLK
09FMN-BMT-A-TFT
MIC_DET
GND_V
21
SFW12S-2STE 1
7
7
9
10
19
2
NC / Line 2
5
A
T
A
D
V
20
C
N
1104
10
11
10
SDA_5V
GND
1
E
T
S
2-
R
0
3
W
F
S
SFW30R-2STE 1
1
D
N
G
1
A
T
A
D
V
Interface connection
K
L
C
M
_
M
C
P
D
N
G
T
U
O
_
FI
D
P
S
N
Y
S
H
GND_V
3
16FMN-BMT-A-TFT
28
V
2
1
+
SDA_5V
+5V_STB
+5V_STB
GND
1
E
NI
L
D
4
3
GND
10
6
5
13
15
+8V
D
N
G
_
V
A
PCM_CLK
11
9
22
21
L
V
5
+
C
N
D
_
D
N
G
3
V
3
+
4
11
+5V_STB
7
SCART0/Line3
12
5
5 7
9
5
IR
3
1
22
GND_V
17
)
d
e
s
u t
o
n
(
Bl
o
V
12
0
1
B
T
S
_
V
5
+
1
+12V_STB
IR
B1
2
E
NI
L
D
GND_V
B1
+12V_STB
-24V
GND
STB_CTL
9
7
6
A
T
A
D
V
8 7 6 5 4 18 17 16 15
F
E
D
C
B
5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
14 13 12 11 10 9
K
A
3 2 1 20 19
B
C
D
E
F
G
H
I
J
L
M
N
O
P
P
O
N
M
L
K
J
I
H
G
A
1 2 3 4
Set Wiring Diagram 3139_249_36791_a2_sh132_sh1.pdf 2006-08-18