Philips DVD 580M Service Manual Download Page 49

Page: 49 / 60

Circuit description

EN 49

DVD580M

9.8.2

The Digital Decoder Module

Reference Clock Oscillator At Digital Decoder

Figure 9-11 Clock Oscillator

In DVD580M, the negation gate of the 27MHz oscillation circuit
is build inside the Digital Decoder (ESS 60x8 pin 49 and 50).
During the start up period of supply voltage, the instant voltage
surge input to the pin 49 of the decoder, the surge voltage will
be inversed and feed into the pin 49 from pin 50 through the
resistor R44, the paralleled crystal hence start to oscillate and
the frequency can be stabilized at 27MHz. The normal
tolerance of the oscillating frequency is within 30 ppm.
There are two types of Crystal for oscillator, fundamental
frequency and Harmonic frequency, defected crystal should be
replaced with same type corresponding to the circuit
requirement (the requirement of the decoder in DVD580M), or
frequency distortion will happen or even no oscillation will start.
The 27MHz crystal in DVD580M is fundamental frequency
type; defected crystal should be replace by the same type.
Also, the capacitors connecting to the crystal are part of the
oscillation circuit, if the capacitors are faulty, the oscillation will
not be set-up.

The Digital Decoder Ic Chip

Figure 9-12 Digital Decoder

The running of Digital decoder needs a stable voltage supply
and accurate clock reference. The Decoder also provides an
auxiliary control port for the system options (pin 160 to 169).
After the system initialization through I2C buses, the software
program will be load into the decoder and start to run. The Disc
loader also transmitting data follows the command from
Decoder, then Video, Audio and digital signal are available at
DVD output terminal afterward.
There is a CPU integrated inside the decoder, hence the
decoder can responsible and control some of the peripheral
device in the DVD system (through additional control port).

The Characteristic And Operation Of Memory Devices

Figure 9-13 FLASH Memory

FLASH memory chip (IC location: U8) is the on line
programmable memory, which can be program by providing a
+5V voltage supply, the memory can be maintained in the chip
even the supply voltage is off.
After the supply voltage is set up, the chip set will be initialized
by activate the reset terminal (pin 25). The FLASH is now
available for data read write, when the interface control
voltages are presented at CE (chip enable), WE (write enable),
Address bus, data bus and OE (output enable).
The operating software in DVD580M is upgradeable through
reading CD-ROM. A dedicated file name should be load into
the CD-ROM as a file identifier in the DVD player; the software
will be upgrade automatically by the player once CD-Rom can
be read successfully.
Note that when the software upgrade is done successfully, the
TV picture will be turned into a blank picture. Turn the player
OFF and ON again, the set will run under the new program.

Figure 9-14 EEPROM Memory

EEPROM is the memory chip that can be rewrite data through
I2C bus interface. The data can be hold in the chip even the
power is OFF. EEPROM is used when the memory size is not
large and no necessary to access the data in high speed. In
DVD580M, EEPROM is used to store the user information such
as menu setting. There is access limitation in EEPROM, When
the EEPROM is faulty, and the system will not be initialized.

CLOCK

CL 26532085_034.eps

180702

Digital

Decoder
Ess60x8

Data port EPROM

ATAPI port for

Loader

Data port for

SDRAM

Clock

Video port