15.13. DG-Board (1 of 2) Block Diagram
EC_R
EC_B
EC_FB
EC_G
EC_FB
EC_R
EC_G
EC_B
PC_V
PC_H
A
V3_R
A
V3_L
A
V3_V
A
V3_C
A
V3_Y
A
V3_S
AV3_S
AV3_L
AV3_R
AV3_Y
AV3_V
AV3_C
MAIN_L
MAIN_R
MAIN_L
MAIN_R
KEY
TV_ON
SOS
SUB_ON
FAN_SOS
LED_R
LED_G
POFF_DEF
SP_MUTE
MAIN_DEF
MCU_RST
JPEG_Y
JPEG_C
AGC1
AFT1
SOS
AV_MUTE
QLINK_SEL
AV4_QLINK
AV2_QLINK
JPEG_RST
RST
SD
A
SCL
SCL
RST
SDA
RST
SD
A
SCL
RST
SD
A
SCL
CVBS1
5
36
13
28
1
MAIN Y VBS
MAIN C
EC R
40
AV4 Y
EC G
AV4 Pb
AV4 Pr
2
44
SUB C
EC B
TO
H1
9
32
EC FB
48
DG1
SUB Y VBS
DG4
TO
H4
12
13
17
18
1
2
3
8
6
7
IC1270
AV SW
35
36
103
101
Q1755 Q1763
Q1750 Q1759
Q1762
Q1765
89
Q1756
Q1761
Q1764
Q1752
60MHz
VIN1
CLK
GC2S+
A/D 8bit
525i/p
1080i
144
60MHz
CONTROL
Noise level
NR/IP
VIN2
RGB->
YUV
SYNC
GAIN ADJ
IC1302
Sync
Macrovision
60MHz
MEMORY
180
Detection
Y
I/F
625i/p
UV
RGB
189
VIN3
720p
CHROMA
DEM.
SUPER
YUV
2D COM
A/D 8bit
PROGRESSIVE
H SCALEER
135
I/F
A/D 8bit
SEPA
COLOUR
DETECT
self,ID,ED2
MULTI
VP
173
172
HP
CLK
161
CLK
177
179
178
VP
HP
171
UV
162
Y
157
148
IC1321
Main/Sub-Mix
64Mbit SDRAM
P-NR
144
UV
Y
153
158
167
PROCESSOR
INPUT
104
118
VP
HP
CLK
103
GC2V
IC1350
Generation
PLLs
Clock
DE-INTERLACER
MOTION ADAPIVE NR
FRAME RATE CONVERTER
IC1308
V-Scale
64Mbit SDRAM
SCALERS
V/H
V/H
ENHANCER
PROCESSOR
OUTPUT
Y
119
128
UV
114
105
169
168
HP
CLK
VP
154
18
15
SD
A
SCL
RST
17
IC4501
SELF,ID,ED2
1080i
A/D 10bit
VPK
COLOUR
DETECT
30MHz
30MHz
A/D 10bit
VP
Macrovision
625i/p
A/D 10bit
MATRIX
NOISE LEVEL
GC2M+
15 14
RGB->
YUV
CLK
CHROMA
DEM.
720p
21
95
32
VIN1
16
VP
MAIN-Y
CLK
HP
VIN3
MAIN-PR
Sync
83
22
VIN2
SEPA
30MHz
Detection
3D/2D com
HP
525i/p
MAIN-PB
72
SYNC
CLK
SW
TBC
I/F
FF
IP
NR
JUST
NR
I/P
FF
49
UV
13
Y
58
4
36
Y
45
UV
31
22
3D Y
MAIN-PB
OUT1
1
A
11
MAIN-Y
B
14
A
IC1305
3D C
3
3D/OTHER
5
B
16
OUT2
Q1327
Q1361
Q1355
Q1325
Q1360
12
2
Y
L
H
A:3D
B:OTHER
L
H
H
L
TP2
21
IC1304
GC 2P
10
16
AOUT1
AOUT2
VIN
27
3D COMB
64Mbit
SDRAM
IC1331
A/D
IC1851
8bit A/D
FORMAT CONV.
93
Y 84
100
RED_IN
BLUE_IN
FB_IN
110
108
41
44
GREEN_IN
RST
53
54
SCL
58
SDA
CLKIN
67
SUB
MAIN
AV4C
AV1/4
SUB PB
SUB PR
SUB Y
MAIN PB
MAIN Y
MAIN PR
32
31
33
26
25
27
SDA0
SCL0
LOGIC
Q1814
Q1811 Q1812
Q1802
Q1804
Q1801
Q1822
Q1824
Q1821
Q1303 Q1336
Q1304 Q1337
Q1302
Q1363
Q1317
Q1340
Q1351
Q1310
Q1326
SOS2
32
JPEG Y
21
JPEG C
25
AGC1
26
AV3 S
17
AV3 L
22
AV3 R
18
SCL0
SDA0
16
SCL1
11
SDA1
14
13
13
7
SCLO SCLI
SDAI
SDA0
SCL0
IC1235
5V<=>3.3V
15
2
SDAO
AV2 QLINK
AV4 QLINK
31
33
QLINK SEL
AV MUTE
35
37
43
AFT1
21
AV3 Y
AV3 V
25
AV3 C
17
MAIN L
20
MAIN R
24
SDA1
R IN
L IN
SCL1
3
13
14
DG6
18
1
SP MUTE
RESET
POFF DEF
16
19
MAIN DEF
20
TO
PA6
3
2
LED R
LED G
TVON
TO
33
34
DG2
32
TO
PA2
36
39
38
DG12
FANMax/Min
K12
SOS
AC ON/OFF
FAN_SOS
TVON
13
Vpulse
11
Hpulse
A
V3 V
1
A
V3 C
KEY
TO G7
10
A
V3 S
3
24
20
A
V3 L
DG7
17
A
V3 R
15
A
V3 Y
1
4
IC1106
DAC
DAC3
SW1
13
14
SDA
SCL
SCL0
SDA0
IC1306
6
AVR 2.5V
3.3V
2
3
1
2.5V
3
5V
1
AVR 3.3V
3.3V
5
IC1853
IC1325
1
AVR 3.3V
5V
3
3.3V
5
AVR 9V
IC1323
1
3
12V
9V
2.5V
PLL2.5V
IC1315
5
1
3
5V
3.3V
AVR 3.3V
IC1333
5
1
3
5V
3.3V
AVR 3.3V
IC1332
5
1
3
3.3V
PLL
2.5V
AVR 2.5V
IC1324
5
1
3
5V
AD
2.5V
AVR 2.5V
IC1322
5
1
3
5V
FRCLK
13
SD
A
SCL
RST
135
97 98
100
FRCLK
2
7
CLK
CLOCK
CLK
IC1313
210
XIN
120
SD
A
32
RST
SCL
31
92
FRCLK
TP3
22
DG Micom,Digtal Signal Processor
TH-37PA30E/TH-42PA30E
DG-Board (1 of 2) Block Diagram
TH-37PA30E/TH-42PA30E
DG-Board (1 of 2) Block Diagram
81
Summary of Contents for TH-37PA30E
Page 8: ...Remove the Rear Cover Remove the AV Connector Cover 8 ...
Page 9: ...Service position 9 ...
Page 22: ...7 3 Lead of wiring 3 22 ...
Page 23: ...7 4 Lead of wiring 4 23 ...
Page 29: ...9 3 Option Description 29 ...
Page 30: ...30 ...
Page 38: ...12 Alignment 12 1 Pedestal setting 12 2 PAL panel white balance 38 ...
Page 39: ...12 3 PC panel white balance 39 ...
Page 40: ...12 4 Sub brightness setting 40 ...
Page 49: ...17 Packing Exploded Views 49 ...
Page 50: ...50 ...
Page 51: ...18 Mechanical Replacement Parts List 51 ...
Page 55: ...19 2 Electrical Replacement Part List 55 ...
Page 124: ...21 Cover for printing with A4 124 ...
Page 179: ...15 Block and Schematic Diagrams 15 1 Schematic Diagram Notes 69 ...
Page 180: ...15 Block and Schematic Diagrams 15 1 Schematic Diagram Notes 69 ...
Page 303: ...1 Applicable signals 5 TH 37PA30E TH 42PA30E ...
Page 313: ...7 Location of Lead Wiring 7 1 Lead of Wiring 1 15 TH 37PA30E TH 42PA30E ...
Page 314: ...7 2 Lead of wiring 2 16 TH 37PA30E TH 42PA30E ...
Page 315: ...7 3 Lead of wiring 3 17 TH 37PA30E TH 42PA30E ...
Page 316: ...7 4 Lead of wiring 4 7 5 Lead of wiring 5 18 TH 37PA30E TH 42PA30E ...
Page 322: ...24 TH 37PA30E TH 42PA30E ...
Page 323: ...9 3 Option Description 25 TH 37PA30E TH 42PA30E ...
Page 324: ...26 TH 37PA30E TH 42PA30E ...
Page 327: ...10 4 IIC mode structure following items value is sample data 29 TH 37PA30E TH 42PA30E ...
Page 331: ...12 Alignment 12 1 Pedestal setting 33 TH 37PA30E TH 42PA30E ...
Page 332: ...12 2 PAL panel white balance 34 TH 37PA30E TH 42PA30E ...
Page 333: ...12 3 PC panel white balance 35 TH 37PA30E TH 42PA30E ...
Page 334: ...12 4 Sub brightness setting 36 TH 37PA30E TH 42PA30E ...