Panasonic SADA15 - RECEIVER, Service Manual

Page: 91 / 103

42
44
RX3
A OUT6
26
A OUT5
25
3 4
5 6 8 9
10(13)
24-bit
DSP PROCESSING
RAM
PROGRAM
MEMORY
RAM
DATA
MEMORY
STC
RAM
INPUT
BUFFER
PLL
CLOCK MANAGER
DA
T
A0~7
8~11,
14~17
CMP DAT 27
CMP CLK 28
CMP REQ 29
25 SCLK N1
26 LRCLK N1
22 SDATA N1
CLK IN
CLK SEL
30
31
FIL
TD
FIL
TS
32 33
MCLK
44
SCLK
43
LRCLK
42
AU DATA0 41
AU DATA1 40
AU DATA2 39
XMT958 3
FIL
T
17 19 40
+V
A
+VD
CM OUT
16 36
SCD OUT
19
EMWR
4
EXTMEN
21 20
INTREQ
5
EMOE
SCDIN
6
SCCLK
7
CS
18
RESET
36
INTREQ
SCD OUT
D OUT1 D IN3
32
D IN2
33
D IN1
34
30
31
MCLK OUT
37
LRCK SCLK
38
AUDATA0
AUDATA1
AUDATA2
X1001
(12.288MHz)
SCLK
SCLK
LRCK
LRCK
A OUT3(4)
23
(24)
CCLK CD OUT CD IN
CS PDN
AUDIO
AIN1L(AIN1R)
OVL/ERR
CCLK CD OUT
CD IN OVL/ERR
PDN CS42
CS RESET
CS49
43
RX1
RX2
AIN2L(AIN2R)
A OUT1(2)
21
(22)
Q1001
POWER
11(12)
AIN1L
14
VSSA
35
VDDA
34
POWER
SUPPLY
AUDATA0
AUDATA1
AUDATA2
XMT958
XMT958
DIGITAL
AUDIO INPUT
INTERFACE
FRAMER
SHIFTER
ROM
PROGRAM
MEMORY
RAM
DATA
MEMORY
INPUT
BUFFER
CONTROLLER
RAM
OUTPUT
BUFFER
OUTPUT
FORMA
TTER
PARALLEL OR SERIAL HOST INTERFACE
COMPRESSED
DATA INPUT
INTERFACE
SPDIF
RECEIVER
L_DSP
A OUT
MCLK
MCLK
XTI
28
AINAUX
15
CA18
IC1001
CS49326-CLR
TV
(OPTICAL)
DVD
(OPTICAL)
CD
(OPTICAL)
JK1302
LOGIC CONTROL
AC3/DTS DECODER DSP
BUFFER
AMP
BUFFER
AMP
BUFFER
AMP
IC1201
NJM4580EDTE1
IC1204
NJM4580EDTE1
INVERTER
LOGIC CONTROL
IC1006
SNAHC1U04DBV
IC1005
SN74HCU04APW
IC1003
SN74LV244APW
LOGIC CONTROL
IC1004
SN7AHCT244PW
+B
+B
+B
+B
+B
+B
JK1301
JK1303
IC1002
C0FBZJ00004
DIR/DAC/VOL
IC1206(1207)
NJM2115D