33
UF-580/590/780/790
DX-600/800
DEC 2003
Ver 2.00
1.2.
Power On Initial Flow Chart
< Check Output : If Signal is not correct, each IC
may be defective >
Initial Flow
Power ON
Hardware Reset
Boot Program in CPU Start
0
Is Cover Open CPU (73) and
BPNT CPU (44) is Low ?
Wait Data from PC
via Parallel I/F
Update Program
Scanning LED Lit &
Scanning LED Flashes
CPU I/O Port Set
I/O Device Reset
I/O Device Port Set
System Program (FROM) Start
SDRAM Working Area Clear
PANEL Initialize
1
UF-780/790 (xx)
UF-580/590 (xx)
Below is displayed on LCD
< Check Output : If Signal is not correct, each IC
may be defective >
Power
Matser
Clock
Reset
CNP6.6 3.3V -> IC1 CPU, IC3 SHINE
CNP6.7 5V -> (3) IC6 (4) 2.5V -> IC3 SHINE
5MHz -> (63) CPU (90) 50MHz
-> (103) IC3 SHINE
Reset IC2 (4) -> -> (32) IC3 SHINE (39)
-> -> (59) IC1 CPU
XTAL
3V
0V
3.3V
0V
CPU (CS0)
IC1 CPU (107) -> -> (26) IC9 FROM
CPU (RD)
IC1 CPU (95) -> -> (28) IC9 FROM
CPU (A1-21)
IC1 CPU (142-118) -> ->
(1-10, 16-25, 48) IC9 FROM
CPU (D0-D15)
IC1 CPU(114, 17-1) -> ->
(29-36, 38-45) IC9 FROM
nMDMRST
IC1 CPU (84) -> -> (41) IC22 Modem
nFRPRST
IC1 CPU (83) -> -> (60) IC30 FRIP
CPU (PNLTXD)
IC1 CPU (67) -> -> CNP14.5
CPU (PNLRXD) IC1 CPU (66) -> -> CNP14.6
CPU (PNLRST) IC1 CPU (85) -> -> CNP14.9
5V
0V
< Check Output : If Signal is not correct, each IC
may be defective >
< Check Output : If Signal is not correct, each IC
may be defective >
...
3.3V
0V
...
N
Y
UF-580/590/
780/790
Only
UF-580/590/
780/790
Only
or
DX-800 (xx)
DX-600 (xx)
or
Summary of Contents for Panafax UF-580
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