12.2
Allocation of Memory Areas
12-7
12.2.4 When Using High-speed Counter Function
Control unit
FP0H mode
Channel no.
Count
input
Hard-
ware
reset
input
Memory area used
Performance
Specifications
Related
instruct-
tions
Control
flag
Elapsed
value
area
Target
value area
Min.
input
pulse
width
Max.
counting
speed
[Single-
phase]
Addition
input
Subtraction
input
CH0
X0
X2
R9110
DT90300
DT90301
DT90302
DT90303
High-
speed
input
5 μs
100kHz
F0
(MV)
F1
(DMV)
F165
(CAM0)
F166
(HC1S)
F167
(HC1R)
CH1
X1
X2
R9111
DT90304
DT90305
DT90306
DT90307
CH2
X3
X5
R9112
DT90308
DT90309
DT90310
DT90311
CH3
X4
X5
R9113
DT90312
DT90313
DT90314
DT90315
[2-phase
input]
Phase
difference
input
Individual
input
Direction
distinction
CH0
X0
X1
X2
R9110
DT90300
DT90301
DT90302
DT90303
High-
speed
input
10 μs
50 kHz
CH2
X3
X4
X5
R9112
DT90308
DT90309
DT90310
DT90311
FP
Σ
mode
Channel no.
Count
input
Hard-
ware
reset
input
Memory area used
Performance
Specifications
Related
instruct-
tions
Control
flag
Elapsed
value
area
Target
value area
Min.
input
pulse
width
Max.
counting
speed
[Single-
phase]
Addition
input
Subtraction
input
CH0
X0
X2
R903A
DT90044
DT90045
DT90046
DT90047
High-
speed
input
5 μs
100kHz
F0
(MV)
F1
(DMV)
F165
(CAM0)
F166
(HC1S)
F167
(HC1R)
CH1
X1
X2
R903B
DT90048
DT90049
DT90050
DT90051
CH2
X3
X5
R903C
DT90200
DT90201
DT90202
DT90203
CH3
X4
X5
R903D
DT90204
DT90205
DT90206
DT90207
[2-phase
input]
Phase
difference
input
Individual
input
Direction
distinction
CH0
X0
X1
X2
R903A
DT90044
DT90045
DT90046
DT90047
High-
speed
input
10 μs
50 kHz
CH2
X3
X4
X5
R903C
DT90200
DT90201
DT90202
DT90203
(Note 1): When the reset input settings of reset input for the single-phase input overlap at CH0 and CH1 or CH2 and
CH3, the setting of CH0 or CH2 has priority.
(Note 2) Only F1 (DMV) instruction can perform the reading and writing of elapsed value area.
Maximum counting speed
These values are available only when the conditions of each item (such as counting method
or channels) are executed. These values are available when the high-speed counter match
ON (F166) instruction, high-speed counter match OFF (F167) instruction, pulse output
function or other interrupt controls are not performed.
Summary of Contents for FP0H Series
Page 1: ......
Page 11: ...1 Functions of Unit and Restrictions on Combination ...
Page 19: ...2 Wiring ...
Page 23: ...3 Power ON and OFF and Items to Check ...
Page 30: ...Power ON and OFF and Items to Check 3 8 ...
Page 31: ...4 Settings of Control Unit ...
Page 52: ...Settings of Control Unit 4 22 ...
Page 53: ...5 Operation Patterns ...
Page 89: ...6 Operating Characteristics ...
Page 93: ...7 Instruction References ...
Page 124: ...Instruction References 7 32 ...
Page 125: ...8 Troubleshooting ...
Page 133: ...9 PWM Output Function ...
Page 140: ...PWM Output Function 9 8 ...
Page 141: ...10 High speed Counter Function ...
Page 151: ...10 3 High speed Counter Instruction 10 11 MEMO ...
Page 170: ......
Page 171: ...11 FPΣ Mode ...
Page 180: ...FP Mode 11 10 ...
Page 181: ...12 Specifications ...
Page 196: ...Specifications 12 16 ...
Page 198: ......
Page 199: ......
Page 200: ......