
14-5
14.1.1 Table of System Registers for FP0
Content of system register settings
1. Setting the timers and counters (System register 5)
By indicating the counter start number, the timer and counter are split into two areas. The timer and
counter together total 144 points, and the default value for th split is 100. Thus the point allotment is as
shown in the table below.
Timer
100 points (No. 0 to No. 99)
Counter
44 points (No. 100 to No. 143)
Setting example
To increase the number of timers to 120, change the value of system register 5 to K120.
For FP0 T32, set the system registers 5 and 6 to the same value. This sets the timer to a non-hold type
and counter to a hold type.
By setting system register 5 to “0”, the whole area becomes the counter. Also, by setting it to the value
“144”, the whole area becomes the timer.
Summary of Contents for FP0 Series
Page 14: ...Table of Contents FP0 xii ...
Page 16: ...Overview FP0 1 2 ...
Page 82: ...S LINK Control Unit FP0 4 2 ...
Page 95: ...Chapter 5 I O Allocation 5 1 I O Number 5 3 5 2 Control Unit 5 4 5 3 Expansion I O Unit 5 5 ...
Page 96: ...I O Allocation FP0 5 2 ...
Page 100: ...I O Allocation FP0 5 6 5 3 Expansion I O Unit ...
Page 102: ...Installation FP0 6 2 ...
Page 112: ...Installation FP0 6 12 6 5 Installation Using FP0 Flat Type Mounting Plate ...
Page 114: ...Wiring FP0 7 2 ...
Page 198: ...High speed Counter Pulse Output PWM Output FP0 9 34 9 5 PWM Output Function ...
Page 200: ...General use Serial Communications FP0 10 2 ...
Page 210: ...Self Diagnostic and Troubleshooting FP0 11 2 ...
Page 220: ...Specifications FP0 12 2 ...
Page 234: ...Dimensions FP0 13 2 ...
Page 243: ...Chapter 14 Appendix ...
Page 380: ...14 138 14 7 ASCII Codes ...