Panasonic FP0 Series, User Manual

Page: 324 / 382

14-82
Num-
ber
Name Boolean Operand Description Steps
F113
P113
Left shift of
one hexade-
cimal digit
(4-bit) WBSL
PWBSL D1, D2 Shifts the one digit of the areas by “D1” and “D2” to
the left. 5
FIFO instructions
F115
P115
FIFO buffer
define FIFT
PFIFT n, D The “n” words beginning from “D” are defined in the
buffer. 5
F116
P116
Data read
from FIFO
buffer FIFR
PFIFR S, D The oldest data beginning from “S” that was written
to the buffer is read and stored in “D”. 5
F117
P117
Data write
into FIFO
buffer FIFW
PFIFW S, D The data of “S” is written to the buffer starting from
“D”. 5
Basic function instructions
F118
UP/DOWN
counter UDC S, D Counts up or down from the value preset in “S” and
stores the elapsed value in “D”. 5
F119
Left/right
shift register LRSR D1, D2 Shifts one bit to the left or right with the area
between “D1” and “D2” as the register. 5
Data rotate instructions
F120
P120
16-bit data
right rotate ROR
PROR D, n Rotate the “n” bits in data of “D” to the right. 5
F121
P121 16-bit data
left rotate ROL
PROL D, n Rotate the “n” bits in data of “D” to the left. 5
F122
P122
16-bit data
right rotate
with carry
flag (R9009)
data RCR
PRCR D, n Rotate the “n” bits in 17-bit area consisting of “D”
plus the carry flag (R9009) data to the right. 5
F123
P123
16-bit data
left rotate
with carry
flag (R9009)
data RCL
PRCL D, n Rotate the “n” bits in 17-bit area consisting of “D”
plus the carry flag (R9009) data to the left. 5