54
9.12. TIMER Section Schematic Diagram
XINTM_OUT
FL_CS[L]
FL_CLK
NC_GND
FL_TXD
TB
US_CLK
XINTP_OUT
1250Hz
V_OUT_MUTE_H
HDMI_CEC_OUT
REMOCON
HDMI_MONI(CEC_IN)
XINTM[TB
US]
XMPREQ[TB
US]
PF
AIL[L]
SYS_PF
AIL[L]
DR_PF
AIL[L]
S_P_SA
VE_L
VREF-
FAN_DC
SD_BOO
T
NC_GND
BP_ST
A
TE
ST
ANDBY_LED
HDMI_P_ON[H]
CENTER_LED
TR
Y_MODE
OFF_MUTE
XRES_BP
TR
Y_PF
AIL
1
MN101C77CPE
IC57001
KEYIN2
KEYIN3_POWER
SD_L
VPP(5V)
VREF
VDD(3.3V)
10MHz_OUT
10MHz_IN
VSS
32.768KHz_IN
32.768KHz_OUT
MMOD
RESET
NC_GND
NC_GND
DWIRE_DATA
DWIRE_CLK
TRY_OP/CL
TEST2[H]
L_SPSAVE
TRY_DILECT
FL_DCDC
P_STANDBY_H
DR_P_ON_H
KISYU1
KISYU2
FANLOCK
NP_MUTE
UARTP2M/TBUS_TXD
[16]UARTM2P/TBUS_RXD
[32]NC_GND
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
G_KEY3
G_KEY2
G_KEY1
G_KEY3_3.3V
G_KEY2_3.3V
G_KEY1_3.3V
G_FL_CS
G_FL_CLK
G_FL_TXD
RX57006
100X4
7
8
6
4
2
5
3
1
RX57005
100X4
7
8
6
4
2
5
3
1
C57004
27P
C57005
27P
H0J100500035
X57001
R57027
470
C57008
0.1
R57031
47K
C57009
0.1
C57011
0.1
NC
VDD
OUT
GND
4
2
3
5
1
C0EBK0000206
IC57005
R57051
24K
R57068
15K
C57017
0.1
R57052
22K
G_REMOCON
G_FL_CS_A
G_FL_CLK_A
G_FL_TXD_A
RX57007
8.2KX4
C57013
0.01
C57010
0.01
C57012
0.01
1
2
4
6
8
3
5
7
QR57004
B1GBCFJJ0040
QR57003
B1GDCFEJ0010
RX57009
100X4
2
1
3
5
7
4
6
8
RX57001
100X4
2
1
3
5
7
4
6
8
VIN
VOUT
GND
NC
ON
5
2
1
4
3
C0DBGGC00007
IC57006
PW_X_SW5.9V
DN
HDMI_MONI
H2
XMPREQ
PE
XINTP
PE
XINTM
PE
DGND
DN
HDMI_CONT
H2
VOUT_MUTE_H
VI
PKS_STATE
PK
HDMI_P_ON_H H1 H2
OFF_MUTE
AI
SP_MUTE
AI
P_STANDBY_H
DN EU
BP_SAVE_L
DN
DN
DN
DR_P_ON_H
FL_DCDC_ON_H
XPKRST
PK
JC_P_ON_H
VO AI
PW_X_SW3.3V
DN
C57014
100P
K57001
0
R57067
10K
R57065
10K
R57043
10K
C57020
1
C57021
1
SD_BOOT
PE
SD_L
VI
PW_ST_D3.3V
DN
PW_CLED_R5.9V
DN
G_SBPTM_A
PE
G_SBMTP_A
PE
G_KEY1
DN
G_KEY2
DN
G_REMOCON
DN
G_KEY3
DN
G_FL_CS
DN
G_FL_CLK
DN
G_FL_TXD
DN
PW_X_SW12.2V
DN
FAN_PWR
DN
G_SCLK_A
PE
LED_HDMI
EX
PW_HLED_5.9V
DN
FAN_LOCK
DN
TRY_DILECT
VO
TRY_OP_CL
VO
TRY_PFAIL
VO
CL57004
CL57012
CL57008
CL57010
CL57014
CL57006
CL57024
CL57026
CL57011
CL57013
CL57028
CL57015
CL57038
CL57001
CL57003
CL57002
CL57007
CL57052
CL57057
CL57063
[1]
KEYIN1_OP_CL
[49]
JC_P_ON[H]
R57071
47K
C57016
0.01
Q57006
B1ABDF000026
Q57005
B1ADGG000004
R57069
1K
R57070
6.2K
C57023
0.1
R57004
47K
QR57006
B1GDCFEJ0010
QR57007
B1GBCFJJ0040
PW_GOOD_H
DN
F
E
D
1
C
B
A
9
8
7
6
5
4
3
2
TIMER SECTION
DMP-BDT300GA/GC/GN/PU
(DIGITAL P.C.B.(8/12))
SCHEMATIC DIAFRAM