Panasonic CQ-C8401W, Service Manual

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Pin
No.
Port Part Name & Description I/O (V)
53 KI1(SOURCE) Key return signal 1 INT/I 0
54 REMO INT Remote control signal
interference
INT 3.7
55 NC/WP/ACC No Connection O 0
56 NC/A21 No Connection O 0
57 NC/A22 No Connection O 0
58 FLASH CE FLASH chip enable O 3.4
59 LCD CS LCD driver chip select O 3.4
60 NC No Connection - -
61 NC No Connection - -
62 REMO 1 Remote control signal I 3.7
63 NC No Connection - -
64 VLCD CONT VLCD 16V control O 3.4
65 M W U REQ MAIN-u-com wake up request O 0
66 LED ON P.LED control output O 3.4
67 NC No Connection - -
68 NC No Connection - -
69 FLASH OE/ LCD
RD FLASH output enable and
LCD driver lead strobe O 3.4
70 LCD WR LCD driver light strobe signal O 3.4
71 FLASH WE FLASH light enable signal O 3.4
72 NC No Connection - -
73 LCD RESET LCD driver reset control O 3.4
74 FLASH RY/BY FLASH ready/busy input I 3.4
75 /RST System reset signal input I 3.5
76 NC No Connection - -
77 X1A No Connection - -
78 X0A Not used I 0
79 VSS Ground - 0
80 X0 MAIN system clock input
(12.5MHz) I 1.3
81 X1 MAIN system clock output
(12.5MHz) O 1.5
82 VCC Positive power supply - 3.5
83 D0 FLASH D0/LCD D0 I 0.9
84 D1 FLASH D1/LCD D1 I 0.9
85 D2 FLASH D2/LCD D2 I 1.1
86 D3 FLASH D3/LCD D3 I 0.9
87 D4 FLASH D4/LCD D4 I 1.0
88 D5 FLASH D5/LCD D5 I 1.1
89 D6 FLASH D6/LCD D6 I 1.1
90 D7 FLASH D7/LCD D7 I 0.8
91 D8 FLASH D8 I/O 0.9
92 D9 FLASH D9 I/O 0.9
93 D10 FLASH D10 I/O 0.9
94 D11 FLASH D11 I/O 0.8
95 D12 FLASH D12 I/O 0.8
96 D13 FLASH D13 I/O 0.7
97 D14 FLASH D14 I/O 0.7
98 D15 FLASH D15 I/O 0.7
99 A16 FLASH A15 O 3.0
100 A17 FLASH A16 O 1.7
11.3. CD Servo Block
IC401 : YESAM275
Pin
No.
Port Descriptions I/O (V)
1 CVSS1 GND - 0
2 A22 TP407 - 0
3 CVSS2 GND - 0
4 DVDD1 I/O system (3.3V) power supply - 3.1
5 A10 Address bus of FLASH ROM O 3.1
6 - - - -
7 A11 Address bus of FLASH ROM O 0
8 A12 O 3.1
9 A13 O 3.1
10 A14 O 3.1
11 A15 O 0
12 /CVDD1 CORE CPU system (1.6V) power
supply - 1.6
13 - - - -
14 DVSS1 GND - 0
15 CVSS3 GND - 0
16 /CVDD2 I/O system (3.3V) power supply - 1.6
17 - - - -
18 - - - -
19 READY - - 3.1
20 /PS FLASH ROM selection signal O 3.1
21 - - - -
22 - - - -
23 R/W Lead/light signal to FLASH ROM O 3.1
24 /MSTRB Memory access signal O 3.1
25 - - - -
26 /MSC - - 3.1
27 MUTE Mute signal output (H:Mute on) O 0
28 - - - -
29 - - - -
30 /HOLD - - 3.1
31 BIO SUBO input I 0
32 MP/MC Operation mode setting (external pull-
up) I 3.1
33 DVDD2 I/O system (3.3V) power supply - 3.1
34 CVSS4 GND - 0
35 BD R1 GND I 0
36 - - - -
37 CVSS5 GND - 0
38 - - - -
39 - - - -
40 DVSS2 GND - 0
41 CLK C M AUDIO bit clock input I 1.6
42 SCK Clock input I 3.0
43 LRCK C
M
AUDIO L/R identifying signal input I 1.6
44 CDFS Serial frame sink signal input I 2.4
45 DATA
CM AUDIO serial data input I 1.6
46 - - - -
47 SI Serial data input I 0
48 CLK M C AUDIO bit clock output O 1.6
49 SCK Clock input I 3.0
50 CVSS6 GND - 0
51 - - - -
52 CVDD3 CORE CPU system (1.6V) power
supply - 1.6
53 LRCK M
C
AUDIO L/R identifying signal output O 1.5
54 CDFS Serial frame sink signal input I 2.4
55 - - - -
56 DVDD3 I/O system (3.3V) power supply - 3.1
57 DVSS3 GND - 0
58 REST
SW Mechanics deck REST SW input I 3.1
15
CQ-C8401W / CQ-C7401W