Panasonic CQ-C7402W, Service Manual

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Pin
No.
Port Descriptions I/O (V)
39 - - - -
40 DVSS2 GND - 0
41 CLK C
M
AUDIO bit clock input I 1.6
42 SCK Clock input I 3.0
43 LRCK
C M
AUDIO L/R identifying
signal input I 1.6
44 CDFS Serial frame sink signal
input I 2.4
45 DATA
CM
AUDIO serial data input I 1.6
46 - - - -
47 SI Serial data input I 0
48 CLK M
C
AUDIO bit clock output O 1.6
49 SCK Clock input I 3.0
50 CVSS6 GND - 0
51 - - - -
52 CVDD3 CORE CPU system (1.6V)
power supply
- 1.6
53 LRCK
M C
AUDIO L/R identifying
signal output O 1.5
54 CDFS Serial frame sink signal
input I 2.4
55 - - - -
56 DVDD3 I/O system (3.3V) power
supply
- 3.1
57 DVSS3 GND - 0
58 REST
SW
Mechanics deck REST SW
input I 3.1
59 DATA
M C
AUDIO serial data output O 1.6
60 SO Serial data output O 1.1
61 - - - -
62 - - - -
63 /NMI - - 3.1
64 /INT0 - - 3.1
65 /INT1 - - 3.1
66 BLKCK Subcode block clock pulse
input
I 0
67 /INT3 - - 3.1
68 CV
DD4
CORE CPU system (1.6V)
power supply - 1.6
69 SW1 Mechanics deck SW1 input I 0
70 CVSS7 GND - 0
71 MCLK Clock output (To Servo
DSP) O 3.1
72 DVSS4 GND - 0
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