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SYSTEM BLOCK DIAGRAM (OVERALL)
FRONT SW
PREP50
(FPGA)
COMP100
REC CH
SELECT
ECC200
CUE R/P HEAD
CUE ERASE HEAD
CTL ERASE HEAD
CUE/CTL
ERASE
CUE
BIAS OSC
REC AMP
AUDIO_LCD
FRONT PRE AMP
ECC_SYS
R/P
HSW
PB AMP
HEAD PHONE
(FRONT/REAR)
CODEC
FRONT MIC IN
PRE
AMP
AMP
WIRELESS
AMP
AMP
MIC
LOWCUT
MIC
LOWCUT
FRONT
VR
AGC
LMT
AGC
LMT
AMP
AMP
ADC
ADC
DAC
DAC
MONITOR
SELECT
DOLBY
AMP
SPEAKER
AMP
(CH1/2)
(CH3/4)
AMP
SELECT
(CH1/2)
RFLP
RPL1
RPL2
RPR1
RPR2
PBL1
PBL2
PBR1
PBR2
FE1
FE2
FE3
FE4
HEAD
AMP
AMP
LPF
FE35OSC
RFEQ
H_BUFF
EVR
BUFF
HEAD
AMP
ENVDET
LPF
(LEVEL ADJ)
ENVADJ
ENVADJ
RECCUR ADJ
RECCUR ADJ
411FIL
B
G
R
CCD SENSOR
SAMPLE
GATE
PRE AMP
LPF
PRE PROCESS
+
-
CAM_DSP
STAR_MINE
(DSP)
BLEMISH
COMP
GAMMA/KNEE
DETAIL
MATRIX
BLOCK DATA
CB GEN
ADCX3
(12bits)
CHAR_FPGA(FPGA)
OUTPUT SEL
CHAR_ADD
METADATA ADD
CAMERA ID
ADD
SYNC GEN
DIGITAL
SHADING
DRIVE
V-CCD
PULSE
DRIVER
PULSE
PULS_PLD
CCD DRIVE PULSE GENERATOR (FPGA)
DIGITAL
DECODER
CAM_MICON
CAM SYS CPU
NVRAM
FLASH_MEM
FLASH
SRAM
VTR SYS CPU
SYS IF
PRE REC MEMORY
(OPTION)
SDRAM
GEN LOCK IN
SYNC
SEP
H LOCK
27MHz PLL
JOG
LENS
AUDIO(CH1/2/3/4)
METADATA/CHAR DATA/
uCOM COMUTICATION
AUDIO
PLL
SC LOCK
4Fsc PLL
SC SEP
P/S
SD SDI
ENCORDER
SDI-TX
(OPTION)
VIDEO_OUT
MECHANICAL
RELAY
CAM_OUT
EVF
DAC
(10bits)
DACX3
(10bits)
DAC
(12bits)
26PIN_OUT
(OPTION)
68PIN
AUDIO OUT
68PIN
AUDIO OUT
RET
68PIN
AUDIO IN
26PIN_AUDIO OUT
(OPTION)
LCD
DRIVER
LCD uCOM
SERVO
SERVO
uCOM
MOTER
DRIVE
PG & FG
AMP
SENSOR
DRIVE &
AMP
CTL
AMP
SOLENOIDE
DRIVE
CTL
DAC(8bit-12ch )
(EEPROM)
DAC(12bit-4ch)
X3
DA DATA
SHD DATA
SHD
SRAM
FONT_ROM
FLASH
(CHAR FONT)
NV RAM
RTC
SD CARD
CARD
uCOM
RS-232C
(9pin)
BLACK
SHADING
GAIN
CNTL
GAIN
CNTL
(AWB/
W-SHD)
PED
CNTL
(ABB)
DAC(8bit)
PRE
KNEE
RECCLK
Xtal
FM_FPGA
MEMORY
CONTROL
(VFR)
36MHz PLL
VIDEO IN
FG
REGEN
(PLD)
REAR AUDIO
68PIN
VIDEO OUT
DC IN
BRAKER
UNREG
DC OUT
INTERFACE
TRIAX
26PIN OUT
(OPTION)
26PIN_AUDIO OUT
(OPTION)
26PIN_OUT
(OPTION)
REAR MIC IN
(CH1-2)
ECU
ECU
ECU
AUDIO OUT
AUDIO OUT
AUDIO OUT
VIDEO OUT
VIDEO_OUT
L_SIDE
GEN LOCK/
VIDEO IN
TC OUT
TC IN
CAM OUT
CAM_OUT
GENLOCK/
VIDEO_IN
TC IN
TC OUT
GENLOCK/
VIDEO_IN
TC IN
TC OUT
BATTERY IN
WIRELESS
PRE
AMP
100PIN
AUDIO IN
AUDIO IN
AUDIO IN
SHUTTER
ABB/AWB
CC/ND FILTER
START SW
WHITE BAL(A/B/PRE)
OUTPUT(KNEE/BARS)
GAIN(L/M/H)
SYNCRO SCAN(+/-)
S-GAIN
USER SW(1/2)
MARKER SW
SIDE SW
VIDEO IN
27MHz PLL
H LOCK
36MHz PLL
SDRAM
SDRAM
SDRAM
SDRAM
HD/VD(VFR)
EE-
PROM
SERIAL
SERIAL
IF_LSI
DOWN-
CONV
RET
FIFO
X8
PLL
X2
PLL
X2
PLL
DAC
(12bits)
CONTROL
AD_CLK
36MHz
36MHz
27MHz
SERIAL CONTROL
DELAY
( Y/Pr/Pb )
TEST SIGNAL
DAC(8bit-12ch )
(EEPROM)
DAC(8bit-12ch )
(EEPROM)
RCU
RCU
P/S
MENU SW
RET_SW
RET_SW
DAC(8bit-2ch)
(EEPROM)
BLEMISH
ROM
TEMP
SENSOR
FLARE
SERIAL
VTR(STBY/SAVE)
MODE CHECK
+ -
CH1 VR
CH2 VR
REC
AMP
HEAD
AMP
LPF
RECCUR ADJ
REC
AMP
HEAD
AMP
ENVDET
ENVADJ
FE35OSC
FE35OSC
FE35OSC
RFLP
AMP
LPF
BUFF
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
100PIN_OUT
HEAD
WIDTH
RP
PB
FE
18um
24um
21um
CYLINDER MOTOR
PL2
PR2
FER2
FEL2
RR2
RL2
RL1
RR1
FEL1
FER1
PL1
PR1
VTR_POWER
CUE
PRE REC
(FPGA)
PRE_REC
INTERVAL REC
META DATA
AUDIO CH SEL
AUDIO LEVEL DET
AUDIO 1KHz GEN
HID GEN
(LEVEL ADJ)
-0-
-
10-
-
20-
-
40-
-db
h min s frm
NDF SLAVE HOLD iREC
-
30-
2
4
1
3
E F
TAPE
BATT
CTL VITCG VIUBG TIME
RF SERVO HUMID SLACK
Summary of Contents for AJSDX900P - 24P DVCPRO 50
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Page 279: ...CBA 1 MOTHER P C BOARD VEP89140A FOIL SIDE FOIL SIDE REF LOC P6 C6 P11 A6 P13 A6 ...
Page 310: ...CBA 32 MENU SW P C BOARD VEP80C58A FOIL SIDE COMPONENT SIDE ...
Page 312: ...PRE REC P C BOARD VEP83608A AJ YA903G FOIL SIDE COMPONENT SIDE CBA 34 ...