PairGain ETU-772, Quick Installation Manual, Page: 22 / 32

System Configuration 700-722-900-02, Revision 02
16 June 21, 1999 UTU-722 and ETU-772 List 1
LTU
AND
NTU I
NTERFACE
S
ETTINGS
The following table lists the settings available in the Config LTU and Config
NTU Interface menus. The settings in boldface type are factory default
settings.
Settings in Config LTU and Config NTU Interface Menus
Settings Description
Primary Timing
Source
(a)
Selects the clock source for the HDSL transmit direction. Choices are:
• INT - Internal Oscillator
• EXT - External 2.048 MHz clock (UTU-722 only)
• Nx64k - Nx64k Serial Data port receive clock (TT)
• HDSL - Recovered clock from received HDSL data
Nx64k Port
Interface Type Select the interface standard for serial data port. Choices are: V.35,
V.36 , X.21, and RS-530.
Data Rate/# of
TSs Read-only display of HDSL data rate and corresponding number of
time slots (TSs) as set automatically by TT clock (Nx64K AUTO mode)
or by HDSL Payload Rate option in Config System Settings menu
(MANUAL mode). Default setting is
256kbps/4 .
Beginning TS Read-only display of beginning time slot. For these units Beginning TS
is always
0 (zero).
Transmit Clock Selects the transmit data (SD) clock as External (EXT) , Internal Rising
Edge ( INT_RISING ) , or Internal Falling Edge (INT_FALLING). Transmit
clock is always EXT if the Timing Source is Nx64k.
CTS
DSR
RLSD Specifies one of three methods the LTU/NTU uses to generate the
Clear to Send (CTS), Data Set Ready (DSR), and Received Line Signal
Detect (RLSD) control signals for the V.35/V36 port. The V.35/V.36
port is hardware-configured as DCE. Set each of these parameters to
match the requirements of the application. Choices are:
• STD (standard) - The output control signal follows the ITU
standards
• ON (force ON) - Control signal is always ON
• OFF (force OFF) - Control signal is always OFF
LL/RL Selects whether the LTU/NTU responds to (enabled) or ignores
(disabled) the Local Loopback (LL) and Remote Loopback (RL) input
control signals. The enabled (
ENA ) status appears on the display.
(a) Primary Timing Source automatically set to Nx64k in Nx64K AUTO mode.