200-04 incorporated the year information after P5 and reduced the allocated control bits
to 18 for format B and 36 for format E.
Note:
DCLS is DC Level Shifted output, pulse width modulated with a pos-
ition identifier having a positive pulse width equal to 0.8 of the reciprocal of
the bit rate, a binary one (1) having a positive pulse width equal to 0.5 of the
reciprocal of the bit rate and a binary zero (0) having a positive pulse width
equal to 0.2 of the reciprocal of the bite rate.
VelaSync can provide IRIG A, IRIG B, IRIG E and IRIG G code in amplitude modulated (AM)
or pulse width coded (TTL) formats. A signature control feature may be enabled for any
IRIG output. Signature control removes the modulation code when a Time Sync Alarm is
asserted.
5.3.3
IRIG B Output
The IRIG B Time Code description follows.
Figure 5-1:
IRIG B time code description
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APPENDIX
Summary of Contents for Spectracom VelaSync 1232
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