ON Semiconductor NCN49597, Manual, Page: 26 / 28

NCN49597
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26
Bit Sync
At the transmit side the data − stream is in sync and in phase
with the zero crossing of the mains. The complex impedance
of the power line together with propagation delay in the zero
cross detector and loop delay in the Rx − filter circuitry will
cause a shift between the physical transmitted bit and the
received S
− FSK signal as illustrated in Figure 23.
Mains
Transmitted
bit stream
Bit delay
Transmission over the Power Line
Modulation
Bit 0 Bit1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Bit 8
t
PC20101119 .1
Figure 22. Bit Delay Cause by Transmission Over a Power Line
To compensate for this delay between physical and
demodulated bit a synchro bit value is introduced. It shifts
forward the Hardware Demodulating process up to 7 chip
clocks. See Figure 24.
Bit 0 Bit1 Bit 2
CHIP_CLK
SBV[2:0] = 0 SBV[2:0] = 3
PC20101119 .2
Figure 23. Compensation for Bit Delay by Shifting
Forward the Start of the Demodulating Process
The synchro bit value can be set using register SBV [2:0].
Table 23. SYNCHRO BIT VALUE
SBV[2:0] Bit Delay
000 0 CHIP_CLK
001 1 CHIP_CLK
010 2 CHIP_CLK
011 3 CHIP_CLK
100 4 CHIP_CLK
101 5 CHIP_CLK
110 6 CHIP_CLK
111 7 CHIP_CLK
Communication Controller
The Communication Controller block includes the ARM
CORTEX M0 32 bit RISC processor, its peripherals: Data
RAM, Program ROM, TIMERS 1 and 2, Interrupt Control,
TEST
− Control, Watchdog and Power On Reset (POR), I/O
ports and the Serial Communication Interface (SCI). The
micro
− processor is programmed to handle the physical layer
(chip synchronization), and the MAC layer conform to
IEC 61334
− 5 − 1. The program is stored in a masked ROM.
The RAM contains the necessary space to store the working
data. The back
− end interface is done through the Local Port
and Serial Communication Interface block. This back − end
is used for data transmission with the application micro
controller (containing the application layer for concentrator,
power meter, or other functions) and for the definition of the
modem configuration.
More details can be found in Reference 1.