ON Semiconductor NCN49597, Manual, Page: 23 / 28

NCN49597
http://onsemi.com
23
The gain changes in the next CHIP_CLK period.
An evaluation phase and a level adjustment take 2
CHIP_CLK periods. ALC operation is enabled only during
the first 16 CHIP_CLK cycles after a hard or soft reset or
after going into transmit mode.
The automatic level control can be disabled by setting
register R_ALC_CTRL[3] = 1. In this case the transmitter
output level is fixed to the programmed level in the register
R_ALC_CTRL[2:0]. See Reference 1.
Table 21. FIXED TRANSMITTER OUTPUT ATTENUATION
ALC_CTRL[2:0] Attenuation
000 0 dB
001 − 3 dB
010 − 6 dB
011 − 9 dB
100 − 12 dB
101 − 15 dB
110 − 18 dB
111 − 21 dB
Remark:
Transmitter Output TX_OUT
The transmitter output is DC coupled to the TX_OUT pin.
Because the complete analog part of NCN49597 is
referenced to the analogue ground REF_OUT, a decoupling
capacitor C
1
is needed when connecting NCN49597 to
external circuitry working with another ground. To suppress
the second and third order harmonic of the generated S
− FSK
signal it is recommended to use a 2
nd
or 4
th
order low pass
filter. In Figure 17 a MFB topology of a 2
nd
order filter is
illustrated.
ALC
control
ALC _IN
Transmitter (S − FSK Modulator )
PC 20091216.1
ARM
Interface
&
Control
TX_OUT
LP
Filter
TX_EN
TO TX POWER
OUTPUT STAGE
FROM LINE
DRIVER
C
1
R
1
V
SSA
C
2
R
2
R
3
C
3
C
4
R
4
Figure 17. TX_OUT Filter
Receiver Path Description
Receiver Block Diagram
The receiver takes in the analog signal from the line
coupler, conditions it and demodulates it in a data − stream to
the communication controller. The operation mode and the
baud rate are made according to the setting in R_CONF,
R_FS and R_FM. The receive signal is applied first to a high
pass filter. Therefore NCN49597 has a low noise operational
amplifier at the input stage which can be used to make a high
pass active filter to attenuate the mains frequency. This high
pass filter output is followed by a gain stage which is used
in an automatic gain control loop. This block also performs
a single ended input to differential output conversion. This
gain stage is followed by a continuous time low pass filter
to limit the bandwidth. A 4
th
order sigma delta converter
converts the analog signal to digital samples. A quadrature
demodulation for f
S
and f
M
is than performed by an internal
DSP, as well the handling of the bits and the frames.