©
Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 6
1
Publication Order Number:
MC14028B/D
MC14028B
BCD−To−Decimal Decoder
Binary−To−Octal Decoder
The MC14028B decoder is constructed so that an 8421 BCD code
on the four inputs provides a decimal (one−of−ten) decoded output,
while a 3−bit binary input provides a decoded octal (one−of−eight)
code output with D forced to a logic “0”. Expanded decoding such as
binary−to−hexadecimal (one−of−sixteen), etc., can be achieved by
using other MC14028B devices. The part is useful for code
conversion, address decoding, memory selection control,
demultiplexing, or readout decoding.
Features
•
Diode Protection on All Inputs
•
Supply Voltage Range = 3.0 Vdc to 18 Vdc
•
Capable of Driving Two Low−power TTL Loads or One Low−Power
Schottky TTL Load Over the Rated Temperature Range
•
Positive Logic Design
•
Low Outputs on All Illegal Input Combinations
•
Similar to CD4028B
•
Pb−Free Packages are Available*
MAXIMUM RATINGS
(Voltages Referenced to V
SS
)
Parameter
Symbol
Value
Unit
DC Supply Voltage Range
V
DD
− 0.5 to +18.0
V
Input or Output Voltage Range
(DC or Transient)
V
in
, V
out
− 0.5 to V
DD
+ 0.5
V
Input or Output Current (DC or Transient)
per Pin
I
in
, I
out
±
10
mA
Power Dissipation per Package (Note 1)
P
D
500
mW
Ambient Temperature Range
T
A
− 55 to +125
°
C
Storage Temperature Range
T
stg
− 65 to +150
°
C
Lead Temperature (8−Second Soldering)
T
L
260
°
C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “P and D/DW”
Packages: – 7.0 mW/
_
C From 65
_
C To 125
_
C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
v
(V
in
or V
out
)
v
V
DD
.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either V
SS
or V
DD
). Unused outputs must be left open.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
G
= Pb−Free Package
MARKING
DIAGRAMS
PDIP−16
P SUFFIX
CASE 648
SOIC−16
D SUFFIX
CASE 751B
1
16
14028BG
AWLYWW
SOEIAJ−16
F SUFFIX
CASE 966
1
16
MC14028B
ALYWG
16
1
MC14028BCP
AWLYYWWG
1
1
1
