background image

AN-6094 
 

© 2012 Fairchild Semiconductor Corporation 

 

www.fairchildsemi.com 

Rev. 1.0.0  •  9/27/12 

4. Design Procedure 

In this section, a design procedure is presented using the 
Figure 1 as a reference. An offline charger with 6 W / 5 V 
output has been selected as a design example. The design 
specifications are: 

 

Line Voltage Range: 90~264

 

V

AC

 and 60

 

Hz 

 

Nominal Output Voltage and Current: 5

 

V

 

/

 

1.2

 

A  

 

Output Voltage Ripple: Less than 100

 

mV 

 

Minimum Output Voltage in CC Mode: 25% of 
Nominal Output (1.25

 

V) 

 

Maximum Switching Frequency: 140

 

kHz

 

 

Figure 7.  Output Voltage and Current Operating Area 

 

[STEP-1] Estimate the Efficiencies  

The charger application has output voltage and current 
that change over a wide range, as shown in Figure 7, 
depending on the charging status of the battery. Thus, the 
efficiencies and input powers of various operating 
conditions should be specified to optimize the power stage 
design. The critical operating points for design: 

 

Operating Point A

, where the output voltage and 

current reach maximum value (nominal output 
voltage and current).

 

 

Operating Point B

, where the frequency drop is 

initiated to maintain DCM operation.

 

 

Operating Point C

, where the output has its 

minimum voltage in CC Mode.

 

Typically, low line is the worst case for the transformer 
design since the largest duty cycle occurs at the minimum 
input voltage condition. As a first step, the following 
parameters should be estimated for low line. 

 

Estimated overall efficiency for operating points A, B, 
and C (E

FF@A

, E

FF@B

, and E

FF@C

): The overall power 

conversion efficiency should be estimated to calculate 
the input power and maximum DC link voltage ripple. 
If no reference data is available, use the typical 
efficiencies in Table 1.

 

 

Estimated primary-side efficiency (E

FF.P

) and 

secondary-side efficiency (E

FF.S

) for operating point A, 

B, and C. Figure 8 shows the definition of primary-
side and secondary-side efficiencies. The primary-side 
efficiency is for the power transferred from the AC 
line to the transformer primary side. The secondary-
side efficiency is for the power transferred from the 
transformer primary side to the power supply output.  

Since the rectifier diode forward voltage drop does not 
change much with its voltage rating, the conduction loss 
of output rectifier diode tends to be dominant for a low 
output voltage application. Therefore, the distribution of 
primary-side and secondary-side efficiencies changes with 
the output voltage. With a given transformer efficiency, 
the secondary- and primary-side efficiency, ignoring the 
diode switching loss, are given as: 

.

.

N

O

FF S

FF TX

N

O

F

V

E

E

V

V

+

(2)

 

.

.

/

FF P

FF

FF S

E

E

E

=

(3)

 

where E

FF.TX

 is transformer efficiency, typically 

0.95~0.98%; V

O

N

 is the nominal output voltage; and 

V

F

 is the rectifier diode forward-voltage drop. 

 

Table 1.  Typical Efficiency of Flyback Converter 

Output 

Voltage 

Typical Efficiency at Minimum  

Line Voltage 

Universal Input 

European Input 

3.3 ~ 6 V 

65 ~ 70% 

67 ~ 72% 

6 ~ 12 V 

70 ~ 77% 

72 ~ 79% 

12 ~ 24 V 

77 ~ 82% 

79 ~ 84% 

 

 

Figure 8.  Primary-Side and Secondary-Side Efficiency 

With the estimated overall efficiency, the input power at 
operating point A is given as: 

@

@

N

N

O

O

IN

A

FF

A

V

P

E

I

=

(4) 

where V

O

N

 and I

O

N

 are the nominal output voltage and 

current, respectively. 

 

 

Summary of Contents for Fairchild FAN302HL

Page 1: ...y ON Semiconductor Typical parameters which may be provided in ON Semiconductor data sheets and or specifications can and do vary in different applications and actual performance may vary over time Al...

Page 2: ...nsformer and controlled with an internal compensation circuit This removes the output current sensing loss and eliminates all external current control circuitry facilitating a higher efficiency power...

Page 3: ...ycle As seen in Figure 2 the outputs of two comparators PWM I and PWM V are combined with the OR gate and used as a reset signal of flip flop to determine the MOSFET turn off instant The lower signal...

Page 4: ...on range since the output current can be properly estimated only in DCM as described in Section 2 As seen in Figure 5 the MOSFET conduction time tON decreases as output voltage decreases in CC Mode wh...

Page 5: ...FF C The overall power conversion efficiency should be estimated to calculate the input power and maximum DC link voltage ripple If no reference data is available use the typical efficiencies in Table...

Page 6: ...nt B are given as N O B O IN B FF B V I P E 9 N O B O IN T B FF S B V I P E 10 The overall efficiency at operating point C can be approximated as N O C O F FF C FF N O C F O V V V E E V V V 11 where V...

Page 7: ...he MOSFET drain to source voltage waveforms When the MOSFET is turned off the sum of the input DC link voltage VDL and the output voltage reflected to the primary side is imposed across the MOSFET cal...

Page 8: ...the power consumption of the IC by minimizing VDD at no load condition NA NS is determined as 1 6 STEP 4 Design the Transformer Figure 12 shows the MOSFET conduction time tON diode current discharge...

Page 9: ...point C is given as min 1 1 DL C S OFF C ON C S C P O C F V N t t f N V V 28 The non conduction time should be larger than 15 of switching period considering the transformer variation and frequency ho...

Page 10: ...as 2 P CCR CS N S O N V R N I K 31 where VCCR is 2 43 V and K 12 and 10 5 V for UL and HL respectively The voltage divider RVS1 and RVS2 should be determined so that VS is about 2 5 V at 85 of diode c...

Page 11: ...s related to the power dissipation in the clamping circuit Setting the voltage overshoot too low can lead to severe power dissipation in the clamping circuit For reasonable clamping circuit design vol...

Page 12: ...network is less than the designed value due to this effect 2 m OSS L C 2 LK OSS L C Figure 18 Drain Voltage Waveform Design Example Assuming that 700 V MOSFET is used the voltage overshoot to limit th...

Page 13: ...g frequency Design Example Assuming a 330 F tantalum capacitor with 100 m ESR for the output capacitor the voltage ripple on the output is 5 59 PK P C DS S N I I A N 2 0 592 2 N DIS A C O O C C O C t...

Page 14: ...L 51 Note that the effect of slope compensation is weaker at high line which increases the gain of control to output transfer function Thus the high line is the worst case for feedback loop design Si...

Page 15: ...or is used STEP 11 Choose Startup Resistor for HV Pin Figure 22 shows the high voltage HV startup circuit for FAN302 applications Internally the JFET is used to implement the high voltage current sour...

Page 16: ...ror amplifier output in normal operation During the load transient or abnormal condition such as output short the error amplifier can be saturated HIGH and the drain current is regulated by the pulse...

Page 17: ...ge traces related to the drain of the MOSFET and the RCD snubber should be away from control circuits to prevent unnecessary interference If a heat sink is used for the MOSFET connect this heat sink t...

Page 18: ...elds 18 H of effective leakage inductance Clamping circuit resistor R10 is adjusted to 390 k based on test results from the actual power supply Note that the sensing resistor is fine tuned to 1 2 base...

Page 19: ...Start Pin End Pin Turns W1 1 2 2UEW 0 15 2 8 2 W2 4 5 2UEW 0 12 1 22 0 22 1 22 3 W3 Fly Fly TEX E 0 4 1 5 3 Pin Specifications Remark Primary Side Inductance 4 5 530 H 7 100 kHz 1 V Primary Side Effec...

Page 20: ...2 shows the loss breakdown for the standby power consumption for 90 VAC and 264 VAC Figure 31 shows the measured output voltage and output current curve The output current is regulated between 1 A and...

Page 21: ...R USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS NOR THE RIGHTS OF OTHERS LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE...

Page 22: ...the rights of others ON Semiconductor products are not designed intended or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices wit...

Reviews: