Omron SYSMAC CP Series, User Manual

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11 High-speed Counters
11-12
CP2E CPU Unit Software User’s Manual(W614)
The high-speed counter ’ s PV is reset when the corresponding High-speed Counter Reset Bit (A5 3 1.00
to A5 3 1.05) goes from OFF to ON.
The CPU Unit recognizes the OFF-to-ON transition of the High-speed Counter Reset Bit only at the begin-
ning of the PLC cycle during the overseeing processes. Reset processing is performed at the same time.
The OFF-to-ON transition will not be recognized if the Reset Bit goes OFF again within the same cycle.
Additional Information
The comparison operation can be selected to stop or continue in the PLC Setup when a high-
speed counter is reset. This enables applications where the comparison operation can be
restarted from a counter PV of 0 when the counter is reset.
The present value of a high-speed counter can be read in the following two ways.
The PV that is stored in the following words can be read using the MOVL instruction or other instructions.
z
Reading the High-speed Counter PV with a PRV Instruction
Software Reset
11-2-4 Reading the Present Value
• Value refreshed at the I/O refresh timing
→
Read PV from Auxiliary Area.
• Value updated when a ladder program is executed
→
Read PV by executing a PRV instruction.
Reading the Value Refreshed at the I/O Refresh Timing
Read PV Auxiliary Area word
High-speed counter 0 A271 (upper digits) and A270 (lower digits)
High-speed counter 1 A27 3 (upper digits) and A272 (lower digits)
High-speed counter 2 A 3 17 (upper digits) and A 3 16 (lower digits)
High-speed counter 3 A 3 19 (upper digits) and A 3 1 8 (lower digits)
High-speed counter 4 A 3 2 3 (upper digits) and A 3 22 (lower digits)
High-speed counter 5 A 3 25 (upper digits) and A 3 24 (lower digits)
Reading the Value When a Ladder Program is Executed
One cycle
Reset b it
PV reset PV not reset PV not reset PV not reset
@PRV
#0010
#0000
D100
15 0
D100
D101
C1: Port specifier (example for high-speed co u nter inp u t 0 (fixed))
C2: Control data (for reading PV)
S: First destination
w ord
PV data lo w er b ytes
PV data u pper b ytes
High-speed co u nter PV that w as read
Exec u tion condition