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68
Computing the Cycle Time
Section 2-7
2-7-8
Interrupt Response Times
Input Interrupt Tasks
The interrupt response time for I/O interrupt tasks is the time taken from when
a built-in input has turned ON (or OFF) until the I/O interrupt task has actually
been executed. The length of the interrupt response time for I/O interrupt
tasks depends on the following conditions. (About 0.3ms)
Note
(1) The wait time occurs when there is competition with other interrupts. As
a guideline, the wait time will be 6 to 169
μ
s.
(2) I/O interrupt tasks can be executed during execution of the user program
(even while an instruction is being executed by stopping the execution of
an instruction), I/O refresh, peripheral servicing, or overseeing. The inter-
rupt response time is not affected by which of the above processing op-
erations during which the interrupt inputs turns ON. I/O interrupts,
however, are not executed during execution of other interrupt tasks even
if the I/O interrupt conditions are satisfied. Instead, the I/O interrupts are
executed in order of priority after the current interrupt task has completed
execution and the software interrupt response time has elapsed.
The interrupt response time of input interrupt tasks is calculated as follows:
Interrupt response time = Input ON delay + Software interrupt response time
Item
Interrupt response time
Counter interrupts
Hardware response
Rise time: 50
μ
s
---
Fall time: 50
μ
s
---
Software interrupt
response
Minimum: 134
μ
s
Minimum: 236
μ
s
Maximum: 234
μ
s + Wait
time (See note 1.)
Maximum: 336
μ
s + Wait time
(See note1.)
Input
(Interrupt signal retrieval)
Interrupt task execution
Input interrupt task
response time
Software interrupt response time
Input ON delay
Cyclic task execution
(main program)
Ladder program
execution time
Return time from
input interrupt task
Next interrupt signal
can be accepted.
The time from completing the ladder program in the input
interrupt task until returning to cyclic task execution is 60
μ
s.
Summary of Contents for CP1L-EL20DR-D
Page 3: ...CP1L EL20D CP1L EM30D CP1L EM40D CP1L EL EM CPU Unit Operation Manual Produced July 2017...
Page 4: ...iv...
Page 10: ...x...
Page 22: ...xxii...
Page 34: ...xxxiv Software Licenses and Copyrights 7...
Page 192: ...158 Trial Operation and Debugging Section 5 3...
Page 250: ...216 Automatic Clock Adjustment and Specifying Servers by Host Name Section 6 7...
Page 666: ...632 Trouble Shooting Section 11 7...
Page 696: ...662 Standard Models Appendix A...
Page 805: ...771 Connections to Serial Communications Option Boards Appendix F Connecting to Unit...
Page 806: ...772 Connections to Serial Communications Option Boards Appendix F...
Page 836: ...802 PLC Setup Appendix G...
Page 838: ...804 TCP Status Transitions Appendix H...
Page 840: ...806 Ethernet Network Parameters Appendix I...
Page 842: ...808 Buffer Configuration CP1L EL EM Appendix J...
Page 844: ...810 Ethernet Specifications Appendix K...
Page 851: ...Index 817 work words 118 write protection 447...
Page 852: ...818 Index...
Page 854: ...820 Revision History...
Page 855: ......