Omron 3G8F7-CRM21, User Manual

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62
Communications Cycle Control Procedures
Section 5-2
[Clear the Detailed Status Group]
Among the statuses in the Detailed status group, the error log, the error
counter and the Master status can be reset to clear. (The Master status here
refers to the maximum communication cycle time, the cumulative CRC
reception error and the cumulative code reception error.)
Follow these steps to clear them:
.
5-2-5 Control of Event Access
Follow these steps to transmit and/or receive Explicit messages.
5. Read a response for the
command
REQUEST_STATUS. The REQUEST_STATUS command response from the
CompoNet Master Board is stored in the Command area
(BD
→
PC) (0x3210). Read it.
6. Release the command
acknowledgment
interrupt. Set the CMD_ACK flag of the Interrupt Clear register
(0x0006) to 1, to clear the interrupt cause.
7. Read the Detailed status
group. The statuses (0x0300 and following) that are requested to
read are stored in the shared memory. Read them.
Step Operation procedure Access to Shared Memory
Step Operation procedure Access to Shared Memory
1. Set the command
REQUEST_
RESETSTATUS. Select the item to clear from the CompoNet Master Board
as the argument of Command area (PC
→
BD) (0x3200).
Set the command REQUEST_RESETSTATUS.
2. Notify the command is
set. Set the CMD flag of the Interrupt Trigger register (0x0002)
to 1.
3. Confirm the command
set has been notified. Confirm the CMD flag of the Interrupt Request
Confirmation register (0x0003) changes to 0.
4. Wait for a command
acknowledgment. Confirm the CMD_ACK flag of the Interrupt Request
Indication register (0x0005) changes to 1. (Check it by an
interrupt or polling.)
5. Read a command
response REQUEST_
RESETSTATUS. The REQUEST_RESETSTATUS command response
from the CompoNet Master Board is stored in the
Command area (BD
→
PC) (0x3210). Read it.
6. Release the command
acknowledgment
interrupt. Set the CMD_ACK flag of the Interrupt Clear register
(0x0006) to 1, to clear the interrupt cause.
Step Operation procedure Access to Shared Memory
1. Set an Explicit message.
Store an Explicit message in the Event area (PC
→
BD)
(0x3300).
2. Notify an event
transmission. Set the SND flag of the Interrupt Trigger register (0x0002)
to 1.
3. Confirm the SND
completes the process for
this Board. Confirm, by polling, the SND flag of the Interrupt Request
Confirmation register (0x0003) changes to 0.