TECHNICAL INFORMATION
__________________________________
The following tables summarize pin assignments
for the I/O channel connectors.
I/O Channel (A-Side)
I/O Pin
Signal Name
I/O
A1
-I/O CH CK
I
A2
SD7
I/O
A3
SD6
I/O
A4
SD5
I/O
A5
SD4
I/O
A6
SD3
I/O
A7
SD2
I/O
A8
SD1
I/O
A9
SD0
I/O
A10
-I/O CH RDY
I
A11
AEN
O
A12
SA19
I/O
A13
SA18
I/O
A14
SA17
I/O
A15
SA16
I/O
A16
SA15
I/O
A17
SA14
I/O
A18
SA13
I/O
A19
SA12
I/O
A20
SA11
I/O
A21
SA10
I/O
A22
SA9
I/O
A23
SA8
I/O
A24
SA7
I/O
A25
SA6
I/O
Summary of Contents for HIPPO II 486
Page 1: ...H I P P O I I 4 8 6...
Page 13: ...GENERAL FEATURES __________________________________...
Page 25: ...GENERAL FEATURES __________________________________...
Page 26: ...GENERAL FEATURES __________________________________ THIS PAGE IS INTENTIONALLY LEFT BLANK...
Page 40: ...CONFIGURING THE SYSTEM __________________________________ 6 5 Vdc...
Page 49: ...TECHNICAL INFORMATION __________________________________...
Page 60: ...TECHNICAL INFORMATION __________________________________ B30 OSC O B31 GND Ground...
Page 63: ...TECHNICAL INFORMATION __________________________________ THIS PAGE IS INTENTIONALLY LEFT BLANK...
Page 71: ...SYSTEM BIOS __________________________________...
Page 77: ...SYSTEM BIOS __________________________________...
Page 90: ...SYSTEM BIOS __________________________________...
Page 93: ...SYSTEM BIOS __________________________________...
Page 98: ...SYSTEM BIOS __________________________________...
Page 101: ...SYSTEM BIOS __________________________________...
Page 106: ...Appendix D System Board Layout _______________________________...
Page 107: ...Appendix E Memory Expansion Card Layout _______________________________...