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Octave 8, Hardware Maintenance Manual

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Voyetra Eight Hardware Maintenance Manual 

 

Revision 1.0a 

 
 
 
 
 

Revision Date 

Changed 

By 

Reason 

1.0 ??/??/1984 

Carmine 

J. 

Bonanno Original 

Revision 

1.0a 06/19/2002 

Joan 

Touzet 

[email protected]

http://www.atypical.net/

Mistake correction 
Revisions for clarity 
Started schematic entry 

 
 
“Copywright [

sic

] 1984 by   OCTAVE-PLATEAU ELECTRONICS, INC. 

    51 

Main 

Street 

Yonkers, New York 10701”

Summary of Contents for 8

Page 1: ...d By Reason 1 0 1984 Carmine J Bonanno Original Revision 1 0a 06 19 2002 Joan Touzet joant ieee org http www atypical net Mistake correction Revisions for clarity Started schematic entry Copywright sic 1984 by OCTAVE PLATEAU ELECTRONICS INC 51 Main Street Yonkers New York 10701 ...

Page 2: ... 10 2 3 HEADPHONES 11 2 4 NOISE 11 2 5 CALIBRATIONS 11 3 VCO CARD 12 3 1 THEORY OF OPERATION 12 3 2 VCO OPERATION 12 3 3 AUTOTUNE FUNCTIONALITY 13 3 4 DC VOLTAGES 14 3 5 CARD PIN SIGNALS 14 3 5 1 Inputs 14 3 5 2 Outputs 14 3 6 TROUBLESHOOTING TIPS 14 3 6 1 Step 50 71 Waveform Tests 15 3 6 2 Step 72 73 Sync Check 15 3 6 3 Step 74 75 Linear FM Check 15 3 6 4 Step 76 79 Modulation Test 15 3 7 TYPICAL...

Page 3: ...ON SYSTEM SCAN CLOCKS 24 5 4 DEMULTIPLEXING REMULTIPLEXING 24 5 5 MONO CONTROLLER MULTIPLEXER 25 5 6 MISCELLANEOUS SWITCHING FUNCTIONS 25 6 KEYBOARD 26 6 1 THEORY OF OPERATION 26 6 2 CIRCUIT OPERATION 26 6 2 1 Power Retrieval 26 6 2 2 Clock Strobe Retrieval 26 6 2 3 Digital Data Acquisition 27 6 2 4 Analog Data Acquisition 28 6 2 5 Keyboard Pressure Sensor 28 6 2 6 Joystick 29 6 3 CALIBRATIONS 29 ...

Page 4: ...specific features Alternately the Quality Control Calibration test tape may be loaded into the instrument and the documented test procedure may be used to test all system functions for proper operation It is strongly suggested that a problem be verified prior to attempting any system troubleshooting Examples of non existent problems are puzzling things like a changing timbre that doesn t always ha...

Page 5: ...efer to the VCO section of this manual A strange clicking or thumping is heard whenever a key is pressed Is the click part of a patch Play the null patch and see if it goes away Try turning off the VCOs in the null patch to see if it s still there Maybe the VCA offsets on the mixer card need calibrating Usually only one voice is out so you ll have to use the SET page to find the culprit One progra...

Page 6: ...itial filter resonance for each VCF 1 4 4 DAC Card Contains the Voice on off functions and the A D and D A functions which allow the CPU to control the analog system components Calibrations include DAC offset adjustment reference trim and mod system offset trim 1 4 5 DIGIMOD Card Contains system clocking logic for the modulation and DAC subsystem 1 4 6 ANAMOD 1 Card Contains the mod subsystem rout...

Page 7: ...ce jacks and an AGC circuit for the Tape input 1 4 12 Power Supply Contains regulators and fuses for 15V 5V 11V 22V as well as power down detection circuitry for the battery backed up RAM on the CPU 1 4 13 Keyboard Contains digital and analog circuits to interface the keys and controllers to the CPU via the Pot Panel FAN JACK Power Supply ANA1 ANA2 DAC VCO VCO VCO VCO DIGI VCF VCF CPU MIX MIX VCO ...

Page 8: ...ow paths Mod Bank VCAs VCO1 VCO2 Fc Q 2 2 2 2 VCO1 VCO1 2 2 2 2 VCO2 VCO2 Mono Contr MIX VCO VCF VCO VCO VCF VCO DAC DIGI ANA1 ANA2 CPU POT x Press Mono Controllers Figure 1 2 Modulation System Signal Flow JACK MIX VCO VCF VCO VCO VCF VCO DAC DIGI ANA1 ANA2 CPU VCO 1 2 VCO 1 2 VCO 1 2 VCO 1 2 Figure 1 3 Audio Signal Flow ...

Page 9: ... 8 8 8 VCA VCA VCA VCF Cards Phones Volume Phones Out 15 Noise Gen MM5837 VCA 2 Vol L R Right Mono Left Master Outputs Buffers VCA VCA Programmable CPU Vol L Parameter Trim Volume CPU Vol R Buffer External Volume Pedal 15 Master Volume 15 Pot Panel Schematic 1 1 System Audio Path ...

Page 10: ...of two such that VCA 0 1 come from one op amp output VCA 2 3 from another op amp output and so on When the keyboard WHOLE 8 Mode is selected the output of sub mixer 0 1 is hard panned to one side of the VOYETRA output while the output of sub mixer 6 7 is hard panned to the other side The outputs for 2 3 and 4 5 are panned to be slightly offset from the center of the stereo spectrum When the SPLIT ...

Page 11: ...a control voltage to this VCA to set the headphone volume 2 4 Noise The noise source is generated by an MM5837 digital noise generator This output is sent to two VCAs which set the noise L R volume and whose outputs are routed to the VCF cards L R The noise is also passed through a low pass filter whose low frequency noise output is routed to the ANAMOD 1 CARD for use as a controller in the Modula...

Page 12: ...ate a square wave that is one octave below the oscillator frequency The waveforms are summed by an LF347 wide bandwidth op amp Since this summer is inverted it is followed by an inverter to form positive waveform outputs that are routed to the VCF card The triangle and sawtooth waveforms are routed through CD4053 analog switches which are turned on or off by the DAC CARD The pulse wave is turned o...

Page 13: ... correction voltage it has to send to the VCO Control Input to have it generate a frequency of 440Hz when the middle A key is pressed on the keyboard This voltage is added to the keyboard voltage when it is sent to the VCO After all this the CPU turns off the sawtooth turns on the pulse and uses the same system routing to measure the pulse width It then computes the initial pulse width voltage nec...

Page 14: ...Voltages The card uses 15V to drive the CEM 3340s and opamp ICs The CEM 3340s also require a stable 5V reference which is derived on board to minimize system interaction between cards The 10V reference from the DAC is also used on this card to provide a current reference for the CEM 3340s 3 5 Card Pin Signals The signals coming into and out of the card are as follows 3 5 1 Inputs Modulation inputs...

Page 15: ...he CEM3340 3 6 3 Step 74 75 Linear FM Check Linear FM is when the output of the VCO2 mixer is routed to the linear control current input on VCO1 Problems can be caused by the CD4053 switch or if the output of VCO2 is defective 3 6 4 Step 76 79 Modulation Test VCO1 and 2 modulation comes from the VCF card see VCF technical description and is fed into the VCOs via summing resistors on the CEM 3340s ...

Page 16: ...can be caused by a bad CD4051 bad buffers or bad CEM3340 First switch the CD4051 with one on a voice that has no problems If the problem now appears on the other voice the CD4051 is bad Then try switching the suspect CEM3340 with a known good one If this isn t it you ll have to try trouble shooting the CD4051 buffer circuits and support circuitry for the CEM3340 3 7 3 Letter E appears or other pul...

Page 17: ...rents of the VCO volume VCAs and the noise voltage dropped across the 100K noise input resistors while the output current is converted to a voltage by the voltage to current converter opamp inverter TL082 U12 This output is routed to the mixer card The filter audio inputs include VCO1 VCO2 and Noise The noise source is generated on the MIXER card and is routed to all four VCFs simultaneously The V...

Page 18: ...ctave change in filter frequency The control voltage is scaled down to less than 100mV at the SSM2044 input pin 13 to obtain the full sweep range of 20 Hz 20 kHz Filter resonance is determined by the control voltage at pin 2 on the SSM 2044 which in turn is derived from the difference amplifier LM324 U7 This difference amplifier receives a signal from the CPU demultiplexed at CD4051 U3 that determ...

Page 19: ...The LF347 buffer amplifiers that precede the CD4052 inputs prevent the scanning clocks from leaking into the VCF audio inputs 4 5 DC Voltages The card uses 15 Volts to drive the SSM ICs and associated audio opamps The LM325 ICs are driven from 8V and 7V to limit their range to within the specifications of the SSM 2044 control inputs The CD4052s used in the modulation demultiplexing are also biased...

Page 20: ...on outputs from the CD4052 U7 and the four Fc modulation outputs should all be at 0 V Thus Q calibration problems where Q will not turn off should take this into account In steps 00 and 01 the Fc output controls from U6 LM324 should be about 2V on pins 1 7 9 14 As in any inverting opamp circuit the negative inputs pins 2 6 9 13 should be at 0 V In step 02 pins 1 7 9 14 should have a sweeping sawto...

Page 21: ...1 and the associated TL068 buffers The outputs of all the TL068s should have a sweeping LFO sawtooth if they re functioning properly If not check if the CD4052 inputs pins 3 13 have sawtooths If they do check the buffers and scan the clocks on pins 6 9 10 on the CD4052 4 7 6 Step 32 35 VCO1 2 Modulation This is the same as Step 28 31 except it refers to U2 and has an LFO square wave output instead...

Page 22: ...cause the VCOs to jitter and sound unstable In this step the outputs of the TL068s are examined at a high scope sensitivity to weed out potentially bad ones The inputs to the CD4052s are all 0V so the TL068 outputs should be 0V as well within 5mV ...

Page 23: ...ls to address these demultiplexers so that the proper analog signal may be refreshed when necessary Since the system uses 15V to bias these CD4051s the control signals including address and enable vary from 0V in logic state LOW to 15V in logic state HIGH When the CPU wants to route the DAC output to a particular demultiplexing location it first selects the slot number 0 7 on the particular CD4051...

Page 24: ...d by an M is encountered in the VOYETRA logic description e g MA0 it stands for modulation system signal Thus MA0 MA1 and MA2 are the modulation system address lines which are periodic square waves The line labeled MODEN MODULATION ENABLE is a shifted enable pulse used to enable demultiplexing CD4051s in the modulation system 5 4 Demultiplexing Remultiplexing The unconventional configuration of CD...

Page 25: ...Switching Functions The two CD4174 addressable latches are used by the CPU to address the POT PANEL parameter trimmers See the POT PANEL theory for an explanation of how these trimmers are accessed The CPU controls these latches via the level shifted 15V address bus and data line D715 Note that a CD4053 triple switch is used to select either the parameter trimmer addresses PA0 PA7 or the mod syste...

Page 26: ...criptions in this section it would be best to review the POT PANTEL theory of operation since much of the explanations pertaining to the operation of the keyboard data and clock power lines is based on the POT PANEL descriptions 6 2 Circuit Operation 6 2 1 Power Retrieval The clock data line from the VOYETRA module is isolated by the high speed diode D1 filtered by a 0 68 µF tantalum capacitor and...

Page 27: ...U6 and latches all of the edge triggered CD4021s connected to the LATCH UB latch upper bus line when the gate transition from low to high occurs Since state Q1 on the CD4015 is still low the LOEWR BUS BAR is in the LOW state while the UPPER BUS BAR is in the HIGH state as a consequence of the CD4049 inverter U7 which buffers the Q1 pin Thus all keys that are not down i e on the UPPER BUS BAR will ...

Page 28: ...e digital level translator CD4051 U8 and enables the analog multiplexer CD4051 U9 The ASTR also sets the outputs of the CD4024 divider to a low state addressing the first input of U9 which is the Y line When the VOYETRA module wants to process the next analog controller which in this case is the X line it sends a clock pulse which is sensed as CK and sent to the CD4024 clock input to advance the C...

Page 29: ...pressure sensors gain adjustment for left and right pressure sensors gain adjustment for left and right pressure sensors and balance Joystick calibrations include offset adjustment for X and Y axes and gain balance for X and Y axes 6 4 Keyboard Troubleshooting Tips It is important to realize that in normal operation the clock power line and keyboard data line are scanned at a rate that is determin...

Page 30: ... flip flop 74LS279 LOW When done the CPU writes to location 4 and sets the flip flop HIGH This DEMUXEN line drives a 16 channel demultiplexer on DIGIMOD that drives all of the system CD4051s In normal operation the DEMUXEN line should always be active i e pulses should always be present since the CPU will always be refreshing the system CD4051s Clock CLK The Keyboard needs a clock signal to shift ...

Page 31: ...lators are driven by the unregulated 21V supply which is fused on the power supply board In normal operation the clock power line should always be active Since the CPU demands information from the keyboard whenever it deems it necessary it will be virtually impossible to sync onto this signal however it should be possible to see the three distinct voltage levels on a good quality oscilloscope 7 3 ...

Page 32: ...urther processed by the analog circuitry that follows the LM324 U16 buffers The CD4053 switches allow the VOYETRA to be controlled by a slave when they are switched to the external positions This is set by the CTRL KBD line that comes from DIGIMOD Also Pitch Bend for the Left and Right sides of the VOYETRA can be turned off with the CD4053 switches that precede the U17 inverters The pressure contr...

Page 33: ...dules Thus the trimmer diode network that follows the pitch bend buffer allows balance to be set while the gain controls for pitch bend left and right adjust for pitch bend range uniformity in both left and right halves of the instrument The X and X controllers are also trimmed to provide consistent ranges between instruments Consult the QUALITY CONTROL section of this manual for calibration proce...

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