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FlexRay Communication Controller (FlexRAY)
PXN20 Microcontroller Reference Manual, Rev. 1
26-100
Freescale Semiconductor
Figure 26-119. Single Transmit Message Buffer Access Regions
The trigger bits MBCCSR
n
[EDT] and MBCCSR
n
[LCKT], and the interrupt enable bit
MBCCSR
n
[MBIE] are not under access control and can be accessed from the application at any time. The
status bits MBCCSR
n
[EDS] and MBCCSR
n
[LCKS] are not under access control and can be accessed
from the controller at any time.
The interrupt flag MBCCSR
n
[MBIF] is not under access control and can be accessed from the application
and the controller at any time. controller clear access has higher priority.
The controller restricts its access to the regions depending on the current state of the message buffer. The
application must adhere to these restrictions in order to ensure data consistency. The transmit message
buffer states are given in
. A description of the states is given in
provides the access scheme for the access regions.
The status bits MBCCSR
n
[EDS] and MBCCSR
n
[LCKS] provide the application with the required
message buffer status information. The internal status information is not visible to the application.
26.6.6.2.2
Message Buffer States
This section describes the transmit message buffer states and provides a state diagram.
Table 26-95. Single Transmit Message Buffer Access Regions Description
Region
Access from
Region used for
Application
Module
CFG
read/write
-
Message Buffer Configuration
MSG
read/write
-
Message Data and Slot Status Access
NF
-
read-only
Message Header Access for Null Frame Transmission
TX
-
read/write
Message Transmission and Slot Status Update
CM
-
read-only
Message Buffer Validation
SR
-
read-only
Message Buffer Search
Message Buffer Data Field: DATA[0-N]
Message Buffer Header Field: Frame Header
MBCCSRn[CMT]
Message Buffer Header Field: Slot Status
Message Buffer Header Field: Data Field Offset
MBCCFRn[MTM/CHA/CHB/CCF*]
MBFIDRn[FID]
MBIDXRn[MBIDX]
MBCCSRn[MBT/MTD]
TX
NF
CMT
SR
CFG
MSG
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
Page 372: ...e200z6 Core Z6 PXN20 Microcontroller Reference Manual Rev 1 13 8 Freescale Semiconductor...
Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
Page 821: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 Freescale Semiconductor 27 49...
Page 822: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 27 50 Freescale Semiconductor...
Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...