NXP Semiconductors PXN2020, Reference Manual, Page: 59 / 1376

Introduction
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 1-17
— Trimming registers to support frequency adjustment with in-application calibration
• Dedicated internal 128 kHz internal RC oscillator for low power mode operation and self wake-up
— 5% accuracy (after factory trim)
— Trimming registers to support improve accuracy with in-application calibration
• Dedicated 32 kHz external oscillator for accurate timed wake-up
1.7.21 System Integration Unit (SIU)
The SIU features the following:
• Up to four levels of internal pin multiplexing, allowing exceptional flexibility in the allocation of
device functions for each package
• Centralized general purpose input output (GPIO) control of up to 155 input/output pins (package
dependent)
• All GPIO pins can be independently configured to support pull-up, pull down, or no pull
• Reading and writing to GPIO supported both as individual pins and 16-bit wide ports
• The majority of the peripheral pins can be alternatively configured as both general purpose input
or output pins. The exception is selected precision ADC channels which support alternative
configuration as general purpose inputs only.
• Direct readback of the pin value supported on all digital output pins through the SIU
• Configurable digital input filter that can be applied to up to 32 general purpose input pins for noise
elimination on external wakeups
1.7.22 Software Watchdog Timer (SWT)
The Watchdog timer on the PXN20 features the following:
• Watchdog enabled out of reset with default 10 ms timeout from internal 16 MHz IRC clock
• Supports normal and windowed mode
• Support for protected access to watchdog control registers with optional soft and hard locks
— Soft lock allows the lock to be overridden by writing a special software code
— Hard lock prevents any changes until after a reset, once enabled
• Watchdog supports optional halting during low power modes
• Configurable response on timeout: reset, interrupt, or interrupt followed by reset
1.7.23 Boot Assist Module (BAM)
The BAM is implemented as follows:
• Configures device to support code download via CAN or UART and execution of download
routine
• Multiple bootcode starting locations out of reset through implementation of search for valid reset
configuration halfword