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AMBA Crossbar Switch (AXBS)
PXN20 Microcontroller Reference Manual, Rev. 1
16-8
Freescale Semiconductor
16.2.1.3
Master General Purpose Control Registers (XBAR_MGPCRn)
The Master General Purpose Control Register (XBAR_MGPCR) controls the arbitration policy during
undefined length burst accesses. The AULB (Arbitrate on Undefined Length Bursts) field determines
whether or not arbitration occurs for the slave port the master owns when the master is performing
undefined length burst accesses.
The MGPCR can only be accessed in supervisor mode with 32-bit access.
16.3
Functional Description
This section describes the functionality of the AXBS in more detail.
16.3.1
Overview
The main goal of the AXBS is to increase overall system performance by allowing multiple masters to
communicate concurrently with multiple slaves. To maximize data throughput, it is essential to keep
arbitration delays to a minimum.
This section examines data throughput from the point of view of masters and slaves, detailing when the
AXBS stalls masters, or inserts bubbles on the slave side.
Address AXB 0x0F00 (XBAR_MGPCR7)
Access: Supervisor read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
0
0
0
0
0
0
0
0
0
0
0
0
0
AULB
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 16-4. Master General-Purpose Control Registers (XBAR_MGPCRn)
Table 16-6. XBAR_MGPCRn Field Descriptions
Field
Description
AULB
Arbitration on Undefined Length Bursts. This field is used to select the arbitration policy during undefined length
bursts by this master.
This field is cleared by hardware reset.
000 No arbitration during undefined length bursts
001 Arbitration allowed on every beat of an undefined length burst
010 Arbitration allowed after four beats of an undefined length burst
011 Arbitration allowed after eight beats of an undefined length burst
100 Arbitration allowed after sixteen beats of an undefined length burst
101–111 Reserved
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
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Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
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Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...