NXP Semiconductors PXN2020, Reference Manual, Page: 202 / 1376

System Integration Unit (SIU)
PXN20 Microcontroller Reference Manual, Rev. 1
8-20 Freescale Semiconductor
8.3.2.9 IRQ Rising-Edge Event Enable Register (SIU_IREER)
The SIU_IREER allows rising-edge-triggered events to be enabled on the corresponding IRQ n pins.
Setting the corresponding bits in the SIU_IREER and SIU_IFEER enables rising- and falling-edge events.
8.3.2.10 IRQ Falling-Edge Event Enable Register (SIU_IFEER)
The SIU_IFEER allows falling-edge-triggered events to be enabled on the corresponding IRQ n pins.
Setting the corresponding bits in the SIU_IREER and SIU_IFEER enables rising- and falling-edge events.
Table 8-11. SIU_ORER Field Descriptions
Field Function
OREn Overrun Request Enable n. Enables the corresponding overrun request when an overrun occurs on the
corresponding IRQn pin.
0 Overrun request disabled.
1 Overrun request enabled.
Offset: SI 0x0028 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
NREE0
1
NREE1
1
0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
IREE
15
IREE
14
IREE
13
IREE
12
IREE
11
IREE
10
IREE
9
IREE
8
IREE
7
IREE
6
IREE
5
IREE
4
IREE
3
IREE
2
IREE
1
IREE
0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1
Once written, the NREEn bits cannot be changed until the next reset.
Figure 8-10. IRQ Rising-Edge Event Enable Register (SIU_IREER)
Table 8-12. SIU_IREER Field Descriptions
Field Function
NREEn NMI Rising-Edge Event Enable n. These write-once bits enable rising-edge-triggered events on the corresponding
NMIn input.
0 Rising edge event disabled.
1 Rising edge event enabled.
Note: Once written, the NREEn bits cannot be changed until the next reset.
IREEn IRQ Rising-Edge Event Enable n. Enables rising-edge triggered events on the corresponding IRQn pin.
0 Rising edge event disabled.
1 Rising edge event enabled.