NXP Semiconductors PXN2020, Reference Manual, Page: 158 / 1376

Clocks, Reset, and Power (CRP)
PXN20 Microcontroller Reference Manual, Rev. 1
6-26 Freescale Semiconductor
The RTC also supports an autonomous periodic interrupt function used to generate a periodic wakeup
request to exit sleep mode or an interrupt request.
6.4.1 RTC Features
Features of the RTC include:
• 32-bit counter
• Four selectable counter clock sources:
— 128 kHz IRC
— 32 kHz_XTAL
— 16 MHz IRC
— 4 – 40 MHz XTAL (restricted to

8 MHz)
• Optional divide-by-512 prescaler and optional divide-by-32 prescaler connected in series in the
clock path feeding the 32-bit counter
• 32-bit counter supports times up to greater than 1.5 months with 1 ms resolution
• 12-bit compare value to support interrupt intervals of 1 s up to greater than 1 hr with 1 s resolution
• RTC interrupt with interrupt enable
• Counter runs in all modes of operation
• RTC status and control register are reset only by POR RTCVAL and APIVAL can be updated
anytime without disabling the clock
• RTC counter is reset when counter is disabled by software and by POR
• Autonomous periodic interrupt support includes:
— 10-bit compare value to support wake-up intervals of 1.0 ms to 1 s
— Wake-up logic has separate enable to support changing compare value while RTC running API
interrupt with interrupt enable
— Operates in all modes of operation
— API compare value can be modified while RTC is running
• Optional interrupt for RTC match, API match, and RTC rollover
• RTC continues to count through all resets except POR, VDD12 LVI, VDD33 LVI, VDDSYN LVI,
VDD5 Low LVI, and VDD5 LVI.
6.4.2 RTC Functional Description
The RTC consists of a 32-bit free-running counter enabled with CNTEN. (CNTEN when negated
asynchronously resets the counter and synchronously enables the counter when enabled.) The value of the
counter may be read via the RTCCNT register. Due to the clock synchronization, the RTCCNT value may
actually represent a previous counter value.
The clock source to the counter is selected with CLKSEL and may be the 128 kHz IRC, the 32 kHz XTAL,
16 MHz IRC, or the 4 – 40 MHz XTAL (if restricted to

8 MHz). The clock path feeding the 32-bit
counter can optionally be divided by the divide-by-512 prescaler or the divide-by-32 prescaler. Note that