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Memory Map
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor
A-47
0x12C0
TCD22—eDMA transfer control descriptor 22
R/W
—
1
24.3.2.17/24-23
0x12E0
TCD23—eDMA transfer control descriptor 23
R/W
—
1
24.3.2.17/24-23
0x1300
TCD24—eDMA transfer control descriptor 24
R/W
—
1
24.3.2.17/24-23
0x1320
TCD25—eDMA transfer control descriptor 25
R/W
—
1
24.3.2.17/24-23
0x1340
TCD26—eDMA transfer control descriptor 26
R/W
—
1
24.3.2.17/24-23
0x1360
TCD27—eDMA transfer control descriptor 27
R/W
—
1
24.3.2.17/24-23
0x1380
TCD28—eDMA transfer control descriptor 28
R/W
—
1
24.3.2.17/24-23
0x13A0
TCD29—eDMA transfer control descriptor 29
R/W
—
1
24.3.2.17/24-23
0x13C0
TCD30—eDMA transfer control descriptor 30
R/W
—
1
24.3.2.17/24-23
0x13E0
TCD31—eDMA transfer control descriptor 31
R/W
—
1
24.3.2.17/24-23
0x1400–0x3FFF
Reserved
0xFFF4_8000
INTC
Chapter 10, Interrupts and Interrupt Controller (INTC)
0x0000
INTC_MCR—INTC module configuration register
R/W
0x0000_0000
10.3.2.1/10-9
0x0004
Reserved
0x0008
INTC_CPR_PRC0—INTC current priority register for
processor 0 (Z6)
R/W
0x0000_000F
10.3.2.2/10-10
0x00C
INTC_CPR_PRC1—INTC current priority register for
processor 1 (Z0)
R/W
0x0000_000F
10.3.2.3/10-12
0x0010
INTC_IACKR_PRC0—INTC interrupt acknowledge register
for processor 0 (Z6)
R/W
0x0000_0000
10.3.2.4/10-12
0x0014
INTC_IACKR_PRC1—INTC interrupt acknowledge register
for processor 1 (Z0)
R/W
0x0000_0000
10.3.2.5/10-14
0x0018
INTC_EOIR_PRC0—INTC end of interrupt register for
processor 0 (Z6)
W
0x0000_0000
10.3.2.6/10-14
0x001C
INTC_EOIR_PRC1—INTC end of interrupt register for
processor 1 (Z0)
W
0x0000_0000
10.3.2.7/10-15
0x0020
INTC_SSCIR0_3—INTC software set/clear interrupt register
0–3
R/W
0x0000_0000
10.3.2.8/10-15
0x0024
INTC_SSCIR4_7—INTC software set/clear interrupt register
4–7
R/W
0x0000_0000
10.3.2.8/10-15
0x0028–0x003F
Reserved
0x0040
INTC_PSR0_3—INTC priority select register 0–3
R/W
0x0000_0000
10.3.2.9/10-16
0x0044
INTC_PSR4_7—INTC priority select register 4–7
R/W
0x0000_0000
10.3.2.9/10-16
0x0048
INTC_PSR8_11—INTC priority select register 8–11
R/W
0x0000_0000
10.3.2.9/10-16
Table A-4. PXN20 Detailed Register Map (continued)
Address Offset
from Module Base
Register
Access
1
Reset Value
2
Section/Page
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
Page 372: ...e200z6 Core Z6 PXN20 Microcontroller Reference Manual Rev 1 13 8 Freescale Semiconductor...
Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
Page 821: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 Freescale Semiconductor 27 49...
Page 822: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 27 50 Freescale Semiconductor...
Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...