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Nexus Development Interface (NDI)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor
36-5
— IEEE-ISTO 5001-2003 standard class 2 compliant with additional class 3 and 4 features
available.
— Program trace via branch trace messaging (BTM). Branch trace messaging displays program
flow discontinuities (direct branches, indirect branches, exceptions, etc.), allowing the
development tool to interpolate what transpires between the discontinuities. Thus, static code
can be traced.
— Ownership trace via ownership trace messaging (OTM). OTM facilitates ownership trace by
providing visibility of which process ID or operating system task is activated. An ownership
trace message is transmitted when a new process/task is activated, allowing development tools
to trace ownership flow.
— Run-time access to the embedded processor memory map via the JTAG port. This allows for
enhanced download/upload capabilities.
— Watchpoint messaging (WPM) via the auxiliary port.
— Watchpoint trigger enable of program and/or data trace messaging.
— Registers for Program Trace, Ownership Trace and Watchpoint Trigger.
— All features controllable and configurable via JTAG port.
•
The capability for an event out signal from either the e200z6 or e200z0 to
generate a debug request to the other core, thus allowing both cores to enter debug mode within a
short period of each other.
NOTE
Because the PXN20 implements multiple Nexus blocks, the configuration
of the Message Data Out pins is controlled by the NPC.
36.2.2
Modes of Operation
The NDI block is in reset when the TAP controller state machine is in the TEST-LOGIC-RESET state. The
TEST-LOGIC-RESET state is entered on the assertion of the power-on reset signal, negation of JCOMP,
or through state machine transitions controlled by TMS. Assertion of JCOMP allows the NDI to move out
of the reset state, and is a prerequisite to grant Nexus clients control of the TAP. Ownership of the TAP is
achieved by loading the appropriate enable instruction for the desired Nexus client in the JTAG controller
(JTAGC) block when JCOMP is asserted.
The NPC transitions out of the reset state immediately following negation of power-on reset.
36.2.2.1
Nexus Reset Mode
In Nexus reset mode, the following actions occur:
•
Register values default back to their reset values.
•
The message queues are marked as empty.
•
The auxiliary output port pins are negated if the NDI controls the pads.
•
The TDO output buffer is disabled if the NDI has control of the TAP.
•
The TDI, TMS, and TCK inputs are ignored.
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
Page 372: ...e200z6 Core Z6 PXN20 Microcontroller Reference Manual Rev 1 13 8 Freescale Semiconductor...
Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
Page 821: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 Freescale Semiconductor 27 49...
Page 822: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 27 50 Freescale Semiconductor...
Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...